Semiconductor device with level conversion circuit

Details Semiconductor device with level conversion circuit Semiconductor device with level conversion circuit

2008-07-15

2008-07-15

Chang, Daniel D (Department: 2819)

Electronic digital logic circuitry

Interface

Logic level shifting

C326S086000, C327S333000

Reexamination Certificate

active

07400168

ABSTRACT:
A level conversion circuit includes a differential pair of first and second transistors receiving differential input signals; a current mirror section; and a CMOS-type latch circuit. The current mirror section includes a first current mirror circuit receiving output current from the first transistor to output a first mirror current; a second current mirror circuit receiving output current of the second transistor to output a second mirror current; a third current mirror circuit receiving the second mirror current to output a third mirror current to a first output terminal of differential output terminals; and a fourth current mirror circuit receiving the first mirror current to output a fourth mirror current to a second output terminal of the differential output terminals.

REFERENCES:
patent: 2001/0033186 (2001-10-01), Green
patent: 2005/0134314 (2005-06-01), Prather et al.
patent: 2000-305528 (2000-11-01), None

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