Semiconductor device with improved pad layout

Details Semiconductor device with improved pad layout Semiconductor device with improved pad layout

1999-05-06

2000-07-25

Hardy, David

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

With particular chip input/output means

257207, H01L 27118

Patent

active

060939427

ABSTRACT:
First I/O signal pads are arranged along the periphery of a semiconductor chip except corner sections thereof at a first pitch, and second I/O signal pads and power supply pads are arranged in the corner sections of the semiconductor chip. In this case, the second I/O signal pads and the power supply pads are alternately arranged at the first pitch, and arrangement of the power supply pads are set so that the pads are located at fixed sites common to semiconductor chips. With this arrangement, the second I/O signal pads are arranged at a pitch wider than the first pitch.

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