Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
1999-04-12
2001-11-20
Clark, Jhihan B (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
75, 75, 75, 75, 75
Reexamination Certificate
active
06320265
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to semiconductor devices, and, more particularly, to ohmic contacts for semiconductors capable of high-temperature processing.
2. Description of the Related Art
Semiconductor devices are increasingly designed to have one or more high-temperature process steps performed after formation of the ohmic contact during the fabrication sequence. Such high-temperature process steps may be required for 1) ion implantation (e.g., to form buried doped layers or to nullify doping of layers), 2) implant annealing, 3) surface treatment, 4) wafer thinning, 5) etching of in features, or 6) epitaxial growth, 7) dielectric deposition, or 8) dopant diffusion. These types of high-temperature steps may be classified as “post-epitaxial” processing steps, since the steps occur after the fabrication sequence but before the semiconductor device itself complete.
In addition, one or more high-temperature manufacturing steps may be employed when the semiconductor device is incorporated into a sub-assembly or component. For example, high temperature steps may be employed during the manufacture of an optical sub-assembly (OSA). The semiconductor laser, pin-diode and lens are affixed to a silicon mounting assembly with electrically conductive areas. The sub-assembly is formed, optically aligned and packaged in one or more steps. Each step typically employs Au—Ge or Au—Sn solder at between 320-380° C. For devices such as the OSA, increased performance of an integrated device may be achieved with solder having a higher melting temperature, as well as increasing the difference between the melting temperatures of the solder employed in each step. These types of high-temperature steps may be classified as “post-manufacturing” processing steps, since the manufacturing steps occur after the semiconductor devices employed are complete.
A high-temperature step that occurs after the formation of the ohmic contact layer may raise the temperature of the material of the ohmic contact and the material of the semiconductor regions near the ohmic contact. Exposure of the semiconductor device to high temperature may cause the properties of the materials of the various regions or layers in the semiconductor device structure to be modified.
In one case, the high temperature may cause dissociation of the materials. Dissociation is typically defined as the process of breaking a chemical compound into its elements (i.e., InP breaks into In and P when exposed to temperatures above 360° C. in vacuo). Dissociation typically occurs at the molecular level. However, dissociation may occur under normal temperatures employed during the fabrication sequence for forming alloys. Dissociation may be a precursor, and cause of, two processes that cause loss of adhesion between layers during the fabrication sequence: delamination and dewetting. Delamination is the physical lifting or pulling apart of layers that were once bonded. Dewetting refers to physical retraction of a wetted liquid from a substrate surface.
Silicide compounds of refractory metals have been employed in the art of semiconductor fabrication to form highly-stable Schottky barriers to, for example, GaAs or InP compound semiconductors. As is known in the art, refractory metals are materials having high chemical bonding strength, mechanical stability, and chemical inertness at temperatures on the order of 1400° C. and above. Such use of refractory metals is described in, for example, U.S. Pat. No. 5,200,349, and in U.S. Pat. No. 4,960,718, which are incorporated herein by reference. Refractory metals may be employed in the prior art to provide a Schottky barrier layer between the gate electrode and active layers of the compound semiconductor in a field effect transistor.
Further, refractory metals are strongly self-bonded chemical structures, enabling high-temperature heat treatment of the semiconductor material during masking and etching stages of transistor fabrication. Refractory metals have also been employed as masks during ion implantation of the device fabrication sequence. Such use of the refractory metals is described in, for example, U.S. Pat. No. 4,330,343, which is incorporated herein by reference.
However, refractory metals, while being strongly self-bonded chemically, tend to form poor or weak chemical bonds with other compounds. This poor chemical bonding is exhibited when the refractory metals are deposited over a substrate material of many common semiconductor compounds. If a refractory metal layer is formed next to the compound semiconductor of a device, high-temperature process steps may cause the compound semiconductor and the refractory metal layer to dissociate, resulting in device failure.
In another case, the high temperature may cause excess reaction or diffusion of the ohmic contact material with one or more materials of the adjacent regions of the compound semiconductor. Reaction or diffusion, for example, may be exhibited when the junction between the ohmic contact (e.g., Pt) and the compound semiconductor (e.g., GaAs substrate) is exposed to high temperatures. A constituent of the semiconductor compound, such as Ga (and to a lesser extent As), may “dissolve” from the substrate into the contact layer to form one or more alloys (e.g., forming GaPt
3
, and to a lesser extent, PtAs
2
). Au/GaAs and Pt/GaAs systems in particular exhibit considerable alloying under relatively high temperatures.
The alloys formed near the junction change the electrical properties of the junction, such as contact resistance and Schottky barrier height between the metal and the compound semiconductor. The actual compounds formed depend on the contact layer metal, semiconductor compounds, and layer thickness. In addition, layer composition is a sensitive function of exposure time and temperature. Consequently, identically fabricated devices of the prior art may exhibit gross variations in thermal stability and in operating characteristics of the device once the devices are exposed to a high temperature process step.
SUMMARY OF THE INVENTION
The present invention relates to a scheme for making semiconductor devices more resistant to semiconductor device variation when the semiconductor device is exposed to a high-temperature process step. A semiconductor device having high-temperature stability in accordance with the present invention comprises a semiconductor layer; a prelayer disposed on the semiconductor layer; a refractory layer disposed on the prelayer; and a conductive layer disposed on the refractory layer. The refractory layer inhibits migration of elements between the conductive layer and the semiconductor layer; and the prelayer inhibits loss of adhesion between the refractory layer and the semiconductor layer.
REFERENCES:
patent: 3879746 (1975-04-01), Fournier
patent: 4330343 (1982-05-01), Christou et al.
patent: 4637129 (1987-01-01), Derkits, Jr. et al.
patent: 4758534 (1988-07-01), Derkits, Jr. et al.
patent: 4960718 (1990-10-01), Aina
patent: 5182218 (1993-01-01), Fujihira
patent: 5200349 (1993-04-01), Yokoyama
patent: 5346855 (1994-09-01), Byrne et al.
patent: 5457345 (1995-10-01), Cook et al.
patent: 5536967 (1996-07-01), Yokoyama
patent: 5559817 (1996-09-01), Derkits, Jr. et al.
patent: 5641994 (1997-06-01), Bollinger et al.
patent: 5670823 (1997-09-01), Kruger et al.
patent: 5675159 (1997-10-01), Oku et al.
patent: 5802091 (1998-09-01), Chakrabarti et al.
“Effect of alloying behavior on the electrical characteristics of n-GaAs Schottky diodes metallized with W, Au, and Pt” by A. K. Sinha and J. M. Poate; Appl. Phys. Lett. vol. 23, No. 12, Dec. 15, 1973, pp. 666-668.
“Growth of RhGa on GaAs (001) in a molecular beam epitaxy system” by A. Guivarc'h, M. Secoue and B. Guenais; Appl. Phys. Lett. 52 (12), Mar. 21, 1988, pp. 948-950.
“n-GaAs Schottky Diodes Metallized With Ti and Pt/Ti” by A. K. Sinha, T. E. Smith, M. H. Read and J. M. Poate; SSE vol. 19, No. 6-E (1976), pp. 489-492.
“Reaction of Sputtered Pt Films On GaAs” by V. Kumar; J. Phys. Chem. Solids, 1975, vol. 36, pp
Chakrabarti Utpal K.
Derkits, Jr. Gustav E.
Clark Jhihan B
Hughes Ian M.
Lucent Technologies - Inc.
Mendelsohn Steve
LandOfFree
Semiconductor device with high-temperature ohmic contact and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device with high-temperature ohmic contact and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device with high-temperature ohmic contact and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2585197