Semiconductor device with high speed write capabilities

Details Semiconductor device with high speed write capabilities Semiconductor device with high speed write capabilities

1997-12-02

2000-03-21

Nelms, David

Static information storage and retrieval

Read/write circuit

Differential sensing

36518901, 365190, G11C 702

Patent

active

060410043

ABSTRACT:
A semiconductor memory device comprises a memory cell array including a plurality of memory cells arranged in an array and having a plurality of rows and a plurality of columns, a plurality of column select gates, provided in association with the plurality of columns, for selecting at least one column of the plurality of columns of the memory cell array, a column decoder for outputting a column select signal to the plurality of column select gates, a plurality of sense amplifiers arranged between the memory cell array and the plurality of column select gates and provided in association with the plurality of columns, and a sense amplifier control circuit for controlling activation of the sense amplifiers independently such that the sense amplifier control circuit activates at least one selected sense amplifier of the plurality of sense amplifiers, which is associated with the at least one column of the plurality of columns selected by the plurality of column select gates, and maintains the unselected sense amplifiers associated with those columns, which are not selected by the plurality of column select gates, in an inactive state.

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patent: 5777927 (1998-07-01), Takahashi et al.
patent: 5831910 (1998-11-01), Suzuki et al.
patent: 5848428 (1998-12-01), Collins

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