Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1996-11-20
1998-08-04
Loke, Steven H.
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257529, H01L 2976, H01L 2900
Patent
active
057897883
ABSTRACT:
Wells of n- and p-type are formed in a p-type substrate. Wells of p-type are also formed in the n-type well. Both the p-type wells are formed by the same process at the same time to make MOS transistors have different threshold voltages. MOS transistors having a long gate length and a low threshold voltage are formed in the p-well in the n-well, and MOS transistors having a short gate length and a high threshold voltage are formed in the p-well at the outside of the n-well. Fuses are formed over the p-type wells in the n-type well at a high density.
REFERENCES:
patent: 5374838 (1994-12-01), Sawada et al.
patent: 5404042 (1995-04-01), Okumura et al.
patent: 5508957 (1996-04-01), Momodomi et al.
patent: 5514889 (1996-05-01), Cho et al.
Asano Masayoshi
Ema Taiji
Kanazawa Kenichi
Katayama Masaya
Miyoshi Satoru
Fujitsu Limited
Fujitsu VLSI Limited
Loke Steven H.
LandOfFree
Semiconductor device with first and second wells which have oppo does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device with first and second wells which have oppo, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device with first and second wells which have oppo will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1180009