Semiconductor device with exposed electrodes

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With semiconductor element forming part

Reexamination Certificate

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Details

C257S700000, C257S712000, C257S713000, C257S758000, C257S717000, C257S720000, C257S675000, C257S796000, C257S784000, C257S786000, C257S730000, C257S668000, C257S701000

Reexamination Certificate

active

06919624

ABSTRACT:
It is difficult to check the mounted state of solder by means of visual inspection after the mounting of a semiconductor device according to a conventional art, in particular, a CSP-semiconductor device, to a substrate and a problem arises wherein defective products increase and yield decreases. Terminals50, 51, 52and53for external connection are exposed from second main surface412of first insulating substrate41in the semiconductor device according to the present invention. Thus, second insulating substrate48is adhered to second main surface412so as to surround the internal portions of these terminals for external connection. Thereby, second insulating substrate48serves as a background mirror so that the mounted state of deep portions of the solder can be ascertained at the time of visual inspection of the mounted state of solder after the mounting of the semiconductor device to the substrate. As a result, the mounted state of the solder can be inspected without failure so that reduction in the number of defective products and increased yield can be attained.

REFERENCES:
patent: 6022763 (2000-02-01), Ohmori et al.
patent: 2001/0005050 (2001-06-01), Ohsawa et al.
patent: 2003/0173577 (2003-09-01), Yoon et al.
patent: 2003/0201525 (2003-10-01), James et al.
patent: 2-151496 (1990-06-01), None
patent: 7-335823 (1995-12-01), None
patent: 11-265964 (1999-09-01), None
patent: 11-307673 (1999-11-01), None
patent: 2001-85450 (2001-03-01), None
patent: 2002-118196 (2002-04-01), None

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