Semiconductor device with dummy gate electrode

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S508000

Reexamination Certificate

active

06930351

ABSTRACT:
A gate electrode, a drain region and a source region of a memory cell transistor are formed in an element forming region in a memory cell region. A gate electrode and source/drain regions of a transistor for peripheral circuitry are formed in an element forming region in a peripheral circuitry region. A dummy gate electrode is formed on an element isolation insulating film, and the position of each end of the dummy gate electrode and that of corresponding end of element isolation insulating film are different. An interlayer insulating film is formed on a semiconductor substrate to cover the gate electrode and the dummy electrode. Thus, a semiconductor device in which occurrence of crystal defects is suppressed can be obtained.

REFERENCES:
patent: 5208179 (1993-05-01), Okazawa
patent: 5538912 (1996-07-01), Kunori et al.
patent: 5686749 (1997-11-01), Matsuo
patent: 2004/0041202 (2004-03-01), Kim et al.
patent: 2001-284599 (2001-10-01), None

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