Semiconductor device with columns

Details Semiconductor device with columns Semiconductor device with columns

1996-05-16

1997-05-06

Mintel, William

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257306, 257329, H01L 27108, H01L 2976, H01L 2994, H01L 31119

Patent

active

056273908

ABSTRACT:
A first impurity diffusion layer forms one of source/drain regions and also forms a bit line. A first semiconductor layer, a channel semiconductor layer and a second semiconductor layer, which forms the other of source/drain regions and also forms a storage node, are disposed on the first impurity diffusion layer. A capacitor insulating film is disposed on a second conductive layer. A cell plate is disposed on a storage node with the capacitor insulating film therebetween. A capacitance of the bit line is reduced, and a dynamic random access memory thus constructed performs a high-speed operation.

REFERENCES:
patent: 4630088 (1986-12-01), Ogura et al.
patent: 4974060 (1990-11-01), Ogasawara
patent: 5001296 (1991-03-01), Gotou
patent: 5136350 (1992-08-01), Itoh
patent: 5214296 (1993-05-01), Nakata et al.
patent: 5243209 (1993-09-01), Ishii
patent: 5281837 (1994-01-01), Kohyama
patent: 5414289 (1995-05-01), Fitch et al.
"A Surrounding Gate Transistor (SGT) Cell for 64/256 MBIT DRAMS", K. Sunouchi et al., IEDM 89-23, pp. 23-26, 1989.

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