Semiconductor device with circuit for reduced parasitic...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257SE23085, C257SE25029, C257SE27016, C257S532000, C257S177000, C257S528000, C257S535000, C257S379000, C257S691000, C257S724000

Reexamination Certificate

active

08008699

ABSTRACT:
Parasitic inductance of the main circuit of a power source unit is reduced. In a non-insulated DC-DC converter having a circuit in which a power MOSFET for high side switch and a power MOSFET for low side switch are connected in series, the power MOSFET for high side switch and the power MOSFET for low side switch are formed of n-channel vertical MOSFETs, and a source electrode of the power MOSFET for high side switch and a drain electrode of the power MOSFET for low side switch are electrically connected via the same die pad.

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patent: 2006-73664 (2006-03-01), None
patent: 548827 (2003-08-01), None
Taiwan Intellectual Property Office office action for the TIPO patent application 096119329 (Feb. 24, 2011).

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