Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1999-03-31
2000-12-19
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Bad bit
365 96, 3652257, G11C 1300
Patent
active
061634883
ABSTRACT:
In a DRAM with an antifuse for programming a defective address, the antifuse and one electrode of a capacitor are connected to a shared node and the other electrode of the capacitor receives a boost signal. To blow the antifuse, the shared node is set high. To maintain the antifuse unblown, the shared node is set low. Then the boost signal is raised high to boost the shared node. Even when the resistance value of antifuse 1 is decreased, excessive current does not flow. This eliminates the necessity of providing a protection circuit as conventional and thus reduces circuit scale.
REFERENCES:
patent: 5243226 (1993-09-01), Chan
patent: 5526312 (1996-06-01), Eltoukhy
patent: 5631862 (1997-05-01), Cutter et al.
"A Low-Power Sub 100 ns 256K Bit Dynamic RAM", S. Fujii et al., IEEE Journal of Solid-State Circuits, vol. SC-18, No. 5, Oct. 1983, pp. 441-446 .
Shimano Hiroki
Tanizaki Hiroaki
Tomishima Shigeki
Fears Terrell W.
Mitsubishi Denki & Kabushiki Kaisha
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