Semiconductor device with adjustable channel width

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257391, 257392, H01L 2994, H01L 31062, H01L 31113, H01L 31119

Patent

active

056295480

ABSTRACT:
A semiconductor device having N-type source and drain regions formed substantially in parallel to each other in the surface of a P-type semiconductor substrate. A channel region having first to fourth edges are sandwiched between each pair of the source and drain regions on the first and second edges. A gate insulating film is formed on the semiconductor substrate. Gate electrodes are formed substantially in parallel to each other on the semiconductor substrate via gate insulating film so as to cross the source and drain regions. The first and second edges of the channel regions are substantially parallel to the source and drain regions, and third and fourth regions are substantially parallel to the gate electrodes. A P-type impurity diffusion region is formed by ion implantation in accordance with self-alignment with gate electrode, at least on either of the third or fourth edge of at least one of the channel regions. An impurity concentration of the impurity diffusion region is adjusted such that it is higher than that of the semiconductor substrate.

REFERENCES:
patent: 4272830 (1981-06-01), Moench
patent: 4317273 (1982-03-01), Guterman et al.
patent: 4395725 (1983-07-01), Parekh
patent: 4811066 (1989-03-01), Pfiester et al.
patent: 5168465 (1992-12-01), Harari
patent: 5285069 (1994-02-01), Kaibara et al.
patent: 5357137 (1994-10-01), Hayama
Bernstein et al., IBM Technical Disclosure Bulletin, "Four-State Memory Cell for Read-Only Storage", vol. 23, No. 10, Mar. 1981, p. 4461.

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