Semiconductor device with a particular DMISFET structure

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257336, 257338, 257378, H01L29/76;29/94

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active

059052848

ABSTRACT:
In forming a P.sup.- body diffused layer in a portion on the source side of an N.sup.- drain diffused layer of a DMOSFET, P-type impurity ions are implanted at a large tilt angle to reach a part of a region underlying an N.sup.+ gate electrode by using, as a mask, a resist film having an opening corresponding to a region in which the body diffused layer of the DMOSFET is to be formed and the N.sup.+ gate electrode so as to be activated. Thereafter, an N.sup.+ source diffused layer and an N.sup.+ drain diffused layer are formed in the P.sup.- body diffused layer and in the N.sup.- drain diffused layer, respectively. Since a high-temperature drive-in process need not be performed to introduce the P-type impurity ions into the region underlying the N.sup.+ gate electrode, a reduction or variations in threshold voltage and the degradation of a gate oxide film each caused by the impurity diffused from the N.sup.+ gate electrode can be prevented. Consequently, there is provided a semiconductor device having a DMOSFET mounted thereon which has a reduced on-resistance and suppresses the activation of a parasitic bipolar transistor due to reduced variations in threshold voltage and a high-quality gate oxide film.

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Zahir Parpia et al., "A CMOS-Compatible High-Voltage IC Process", IEEE Transactions on Electron Devices, Oct. 88, vol. 35, Nr. 10, pp. 1687-1694.
Fujishima et al., High-Performance Lateral DMOSFET with Oxide Sidewall Spacers; Proceedings of the International Symposium on Power Semiconductor Devices, pp. 349-352 (May 1994).
Su et al., A High-Performance Scalable Submicron MOSFET for Mixed Analog/Digital Applicatons; Proceedings of the International Electron Devices Meeting, pp. 91/367-370 (Dec. 1991).

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