Semiconductor device which radiates heat and applies substrate p

Details Semiconductor device which radiates heat and applies substrate p Semiconductor device which radiates heat and applies substrate p

1996-07-31

1997-04-08

Crane, Sara W.

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

257698, 257717, 257738, 257778, H01L 2348, H01L 2352

Patent

active

056190700

ABSTRACT:
A semiconductor device includes a chip, a chip mounting plate, a heat radiating plate, first and second bumps, a conducting path forming member and a package. The chip has a semiconductor element in its main surface, and the rear surface thereof is mounted on the chip mounting plate with conductive adhesive. The chip mounting plate includes an insulating plate on which projecting portions are provided at corner portions, and a metal layer for covering the surface on which the chip is mounted. The projecting portions are formed such that the bottom surfaces thereof and the main surface of the chip are located on the same plane when the chip is mounted. The chip mounting plate is fixed to the heat radiating plate with adhesive. A first conducting path is provided on one surface of the conducting path forming member and a second conductive path is formed within the conducting path forming member. Bumps for connecting external terminals, which are electrically connected to the second conducting path are provided on the other surface of the conducting path forming member. The electrode of the chip is connected to the first conducting path via the first bumps, and the projecting portions are connected to the first conducting path via the second bump. The chip, the chip mounting plate, a portion of the heat radiating plate and a portion of the conducting path forming member are sealed in the package.

REFERENCES:
patent: 4820013 (1989-04-01), Fuse
patent: 5311059 (1994-05-01), Banerji et al.
patent: 5371404 (1994-12-01), Juskey et al.
patent: 5397917 (1995-03-01), Ommen et al.
patent: 5444300 (1995-08-01), Sato et al.
Yasuo Nakatsuka et al., "Fine Pitch and High Lead Count Multilayer Ceramic QFP," IEEE 1993 Japan IEMT Symposium Proceedings, pp. 178-180, (Jun. 9-11, 1993).
"Multichip Module For 156MB/S Optical Interface", Tanaka et al., Japan IEMT Symposium, pp. 81-84 (1993).
"Fine Pitch and High Lead Count Multilayer Ceramic QFP", Nakatsuka et al., Japan IEMT Symposium, pp. 176-177 (1993).

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