Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate
2005-05-24
2005-05-24
Williams, Alexander Oscar (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
C257S685000, C257S777000, C257S778000, C257S723000, C257S712000, C257S704000, C257S532000, C257S728000, C257S725000, C257S724000, C257S528000, C257S720000
Reexamination Certificate
active
06897552
ABSTRACT:
There is here disclosed a semiconductor device comprising a chip-mounting-member having a lead formed on its major surface, the lead having a thin film plated portion which covers a surface of a predetermined portion of the lead, a semiconductor chip having a bump formed on its major surface, and mounted on the chip-mounting-member by electrically connecting the bump to the lead via the plated portion, and an encapsulating-member formed between the semiconductor chip and the chip-mounting-member.
REFERENCES:
patent: 6013948 (2000-01-01), Akram et al.
patent: 6020629 (2000-02-01), Farnworth et al.
patent: 6413798 (2002-07-01), Asada
patent: 6472734 (2002-10-01), Arakawa et al.
patent: 6472735 (2002-10-01), Isaak
patent: 6661098 (2003-12-01), Magerlein et al.
patent: 6759268 (2004-07-01), Akagawa
patent: 20010040290 (2001-11-01), Sakurai et al.
patent: 20020011677 (2002-01-01), Yokoi et al.
patent: 20020056906 (2002-05-01), Kajiwara et al.
patent: 20020195720 (2002-12-01), Miyazaki
patent: 20030001286 (2003-01-01), Kajiwara et al.
patent: 20030116866 (2003-06-01), Cher 'Khng et al.
patent: 09-260421 (1997-10-01), None
patent: 10-056259 (1998-02-01), None
patent: 10-056260 (1998-02-01), None
patent: 10-112476 (1998-04-01), None
patent: 10-135267 (1998-05-01), None
patent: 11-251363 (1999-09-01), None
patent: 11-297753 (1999-10-01), None
patent: 2001-223243 (2001-08-01), None
patent: 2001-257237 (2001-09-01), None
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Williams Alexander Oscar
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