Semiconductor device verification system and semiconductor...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000, C716S030000

Reexamination Certificate

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07665050

ABSTRACT:
A semiconductor device verification system capable of verifying operation with great accuracy. A pattern matching verification system outputs interference pattern information. A physical verification system compiles the interference pattern information and a design rule and extracts a design rule applied to the interference pattern information. The physical verification system then refers to the design rule to verify a compared cell list and the interference pattern information. As a result, the physical verification system can perform physical verification of layout data without skipping data regarding the compared cell list.

REFERENCES:
patent: 2006/0090146 (2006-04-01), LeBritton et al.
Patent Abstract of Japan, Japanese Publication No. 2004,013264, Published Jan. 15, 2004. (1pg).
Patent Abstract of Japan, Japanese Publication No. 02-082637, Published Mar. 23, 1990. (1pg).
Patent Abstract of Japan, Japanese Publication No. 03-022459, Published Jan. 30, 1991. (1pg).

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