Semiconductor device utilizing a lead on chip structure

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – On insulating carrier other than a printed circuit board

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Details

257669, 257670, 257674, 257676, 257691, 257692, 257784, 257787, 361723, 361772, 361813, H01L 23495

Patent

active

061336246

ABSTRACT:
A semiconductor device comprises a semiconductor chip having a major surface, a plurality of bonding pads provided on the major surface of the semiconductor chip, an adhesive tape provided on a selected part of the major surface of the semiconductor chip, and a plurality of inner leads mounted on the adhesive tape, each adhered at a lower surface thereof to the adhesive tape. The device further comprises a wiring lead, bonding wires, and a resin-molded package. The wiring lead has at least one end portion and spaced apart from the major surface of the chip. The at least one end portion is depressed from the inner leads toward the semiconductor chip, located outside the adhesive tape and formed integral with at least one of the inner leads. The bonding wires are spaced apart from the wiring lead and connected, at one end, to upper surfaces of the inner leads other than the inner lead which is formed integral with the at least one end portion of the wiring lead, and at the other end, to the bonding pads which are provided on the chip. The resin-molded package encapsulates the semiconductor chip, the adhesive tape, the inner leads, the wiring lead and the bonding wires.

REFERENCES:
patent: Re35496 (1997-04-01), Yamamura et al.
patent: 5227232 (1993-07-01), Lim
patent: 5371044 (1994-12-01), Yoshida et al.
patent: 5760468 (1998-06-01), King et al.
patent: 5821605 (1998-10-01), Hong et al.
patent: 5874783 (1999-02-01), Yamada
patent: 5914529 (1999-06-01), King et al.

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