Patent
1990-06-25
1992-05-05
Jackson, Jr., Jerome
357 41, 357 40, H01L 2710
Patent
active
051112710
ABSTRACT:
A semiconductor device formed by using a standard cell system is a semiconductor device using a multi-layered wiring system. At this time, inter-cell wirings for electrically connecting different standard cells are formed of only a conductive layer which is disposed above a conductive layer constituting intra-cell wirings of the standard cells. Connection between the inter-cell wirings is made above an occupied area of the standard cells on the semiconductor substrate so as to eliminate a channel region.
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patent: 4893170 (1990-01-01), Tokuda et al.
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patent: 4951111 (1990-08-01), Yamamoto
patent: 4969029 (1990-11-01), Ando et al.
Patent Abstracts of Japan vol. 13 No. 254 (E-722)(3602) Jun. 13, 1989.
Proceedings of the 1985 Custom Integrated Circuits Conference, May 20, 1985, pp. 12-13, S. Atiq Raza et al., "Channelless Architecture: A New Approach for CMOS Standard Cell Design".
Patent Abstracts of Japan Patent Application No. 51-94003, published Sep. 8, 1976, to Hitachi Seisakusho K.K.
Hatada Hiroshi
Mori Shojiro
Dang Hung Xuan
Jackson, Jr. Jerome
Kabushiki Kaisha Toshiba
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