Semiconductor device, testing and manufacturing methods thereof

Details Semiconductor device, testing and manufacturing methods thereof Semiconductor device, testing and manufacturing methods thereof

2006-03-02

2010-02-23

Tran, Michael T (Department: 2827)

Static information storage and retrieval

Read/write circuit

Testing

C365S233500

Reexamination Certificate

active

07668027

ABSTRACT:
In order to easily perform a timing test on a memory interface included in a semiconductor device so as to satisfy a restriction on latency, the present invention provides a semiconductor device with the memory interface including: a clock output terminal that outputs a clock signal associated with an operation of a memory connected to the memory interface; a command terminal that outputs a command signal associated with control of a state of the memory; a data terminal that exchanges a data signal with the memory; and a data strobe terminal that exchanges a data strobe signal for establishing the data signal. This semiconductor device includes a testing terminal that outputs in advance a signal for starting a test on the memory interface apart from the command signal.

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Doc. No. J0234E30 (ver.30)—How to Use DDR SDRAM—issued Apr. 2002, Elpida Memory, Inc.—URL:<http://www—elpida—com/pdf/j0234E30.pdf> (90 pages).

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