Semiconductor device tester and semiconductor device test...

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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C250S310000

Reexamination Certificate

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06559662

ABSTRACT:

CROSS REFERENCE TO RELATED APPLICATIONS
The present invention claims priority from Japanese Patent Applications No. 11-340696 filed Nov. 30, 1999, No. 2000-191818 filed Jun. 26, 2000 and No. 2000-332754 filed Oct. 31, 2000, the contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the test of a semiconductor device using an electron beam. Particularly, the present invention is suitable for use in a contact hole test.
2. Description of Related Art
In the recent semiconductor device, the size of semiconductor device is reduced more and more and the number of layers thereof is increased more and more in order to improve the performance of the semiconductor device. Therefore, the size of a structure to be formed by etching is in the order of 0.1 micron, so that it is particularly difficult to stably form fine contact-holes or via-holes. The contact-hole or via-hole is a hole formed in an insulating layer for electrically connecting a wiring formed on the insulating layer to a wiring underlying the insulating layer.
Since the size of such hole is reduced proportionally to the reduction of the size of semiconductor device and the operating clock frequency of semiconductor is increased, it is not enough for the contact-hole to merely provide an electric connection. That is, the transmission speed of electric signal through the contact-hole becomes a problem. For example, since a resistance value of one contact-hole is as large as 10 K&OHgr; and a capacitance value between adjacent wiring is in the order of 0.01 pF or more, the time constant of the contact-hole becomes large enough to affect the rising speed of the clock with which the semiconductor device operates. If the time constant varies, the operating speed of a logic circuit varies. Therefore, it is necessary to wait until a decision is settled down. When the waiting time is long, there is a problem that a computation speed can not be improved even when the operating speed of elements constituting the logic circuit is improved.
In order to improve the operating speed of a whole semiconductor device, it is necessary to reduce the waiting time to as small value as possible by keeping an amount of delay of a rising edge of a clock signal, which is caused by the contact-hole, at a constant value or less. In order to realize such reduction of waiting time, it is necessary to manage the etching process for forming the contact-hole such that the diameter of the contact-hole becomes as designed. Further, if the diameter of the contact-hole is too large, it may contact with an adjacent element, causing unnecessary electric connection thereto to be formed. This is referred to as “leakage” and is one of defects of the semiconductor device. Therefore, it is necessary, in order to decide a contact-hole acceptable or not, to decide whether or not the diameter of the contact-hole is within a certain range with respect to a reference value.
In order to perform such decision, it has been usual that a bottom diameter of a contact-hole is measured by destroying a sample. As a first prior art method in such destructive measurement, there is a cross sectional SEM (Scanning Electron Microscope) measurement. In such method, a wafer is cut by using a glass cutter or FIB (Focused Ion Beam), etc., such that a cross section is taken exactly along a line passing through a center of the contact-hole. Then, the wafer is put on a sample table such that the cut plane becomes in parallel to the sample table and the cross section thereof is observed by a SEM to measure a longest distance of a bottom of the contact-hole on an image thereof Since the shape of the contact-hole is not always true circular, it is usual to measure distances in some directions and decide an average distance as the diameter of the bottom of the contact-hole. In order to measure an exact absolute diameter of the bottom, it is usual to compare a standard distance on the image with the displayed distance of the bottom of the contact-hole by observing the standard distance and the distance of the sample, simultaneously.
In a second prior art method, an oxide film formed on a surface of a sample, in which a contact-hole is formed, is removed by etching or CMP (Chemical/Mechanical Polishing), etc. On the surface of the sample from which the oxide film is removed, there is a mark left, which is produced when the contact-hole is etched and reflects a shape of a bottom of the contact-hole. The sample is put on a sample table such that the etching mark becomes in parallel to the sample table and the etching mark is observed by a SEM to measure a distance of the etching mark. The second method is featured by the fact that the preciseness of the measurement is high compared with the first method since the preciseness does not depend on the preciseness of cutting the sample.
However, these prior art methods are destructive methods as mentioned previously and there is a problem that it is impossible to directly measure a product. Further, since the SEM measurement is performed manually, there is another problem that the measurement takes long time and it is impossible to process a number of samples at high speed. Therefore, there is a further problem that the number of measuring points for each wafer is very small and the reliability of measurement is degraded.
As means for solving these problem, JP 10-281746A filed by the assignee of the present invention discloses a technique in which a current produced by electron beam passed through a contact-hole and reached a substrate is detected, from which a position and a size of a bottom portion of the contact-hole are detected. JP 4-62857A discloses a technique in which a sample is irradiated with not electron beam but ion beam to observe a secondary electron image by measuring a substrate current produced by the irradiation of ion beam. In JP 2000-174077A published on Jun. 23, 2000, a technique for testing a number of contact-holes within a short time is disclosed, in which a semiconductor wafer is sectioned to a plurality of regions and a ratio of normal contact-hole in each region is tested. Further, JP 2000-174077A discloses a technique for displaying the measured ratios correspondingly to the respective regions.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor tester and a semiconductor test method, which is capable of testing a semiconductor device at high speed without destroying the semiconductor device, by improving the technique for detecting a substrate current produced by irradiating the semiconductor device with electron beam.
The present invention is featured by that, by utilizing the principle of measurement of characteristics of a semiconductor device including a structure thereof on the basis of an amount of current produced in a sample by irradiation of low energy electron beam, characteristics of an arbitrary region of the sample is measured at high speed without destroying the sample by setting a measurement mode according to a measuring object.
That is, according to a first aspect of the present invention, a semiconductor device is provided, which comprises means for sequentially irradiating a plurality of measuring positions on a sample with electron beams having identical cross sectional shapes, means for measuring a current produced in the sample when individual measuring positions are irradiated with electron beams, and display means for displaying the measured currents or physical amounts derived from the measured currents on a two-dimensional plane as not mere numerical values but a function of measuring position and measuring region. The measuring means preferably measures a total amount of currents produced when the individual measuring positions of the sample are irradiated with an electron beam.
The present invention can be utilized in testing various semiconductor devices and, particularly, in testing contact-holes of various semiconductor devices. In the latter case, the irradiating means pre

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