Semiconductor device testable on quality of multiple memory...

Static information storage and retrieval – Read/write circuit – Data transfer circuit

Reexamination Certificate

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C365S189180, C365S189040, C365S189050, C365S189080, C365S193000

Reexamination Certificate

active

07978543

ABSTRACT:
A semiconductor device includes: first and second input/output terminals; a first input/output line connected to the first input/output terminal; a second input/output line connected to the second input/output terminal; and a first by-path route that connects the first input/output line and the second input/output line. When in normal operation mode, the first by-path route is set in a non-conductive state. When in a test mode, the first by-path route is set into a conductive state so that a first data inputted to the first input/output terminal is outputted as a first data to the second input/output line, in correspondence with a transition of a clock signal in the first direction, and so that a second data inputted to said first input/output terminal is outputted as a second input data for said first input/output line, in correspondence with a transition of said clock signal in the second direction.

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