Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2001-04-26
2002-12-10
Munson, Gene M. (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S359000, C257S363000, C257S489000, C257S490000
Reexamination Certificate
active
06492689
ABSTRACT:
BACKGROUND OF THE INVENTION
In general, the present invention relates to a semiconductor device and a method of manufacturing the semiconductor device. More particularly, the present invention relates to an effective technique applied to a technology of putting a switching regulator used as a direct-current regulated power supply in an IC (Integrated Circuit).
A direct-current regulated power supply is used for driving electronic devices such as a personal computer and a hand phone or electronic circuits with a high degree of precision and in accordance with specifications. A switching direct-current regulated power supply also referred to as a switching regulator is known as one of direct-current regulated power supplies. A switching regulator once rectifies an alternating-current input voltage into a direct-current voltage and then converts the direct-current voltage back into an alternating-current voltage by using an on/off circuit comprising transistors before again rectifying the alternating-current voltage into a final direct-current output by using a rectification circuit. Control methods adopted by a switching regulator include a pulse-width control technique of controlling the width of pulses generated within a fixed period of time and a frequency control technique of varying the number of generated pulses in accordance with the magnitude of a load.
In the IEEE Transactions on Electron Devices, Vol. 44, No. 11, November 1997, pp 2002 to 2010, there is described a technology of putting a portion of a switching regulator in an integrated circuit. This reference discloses an SJT (Spiral Junction Termination) structure wherein, during a process of putting the switching regulator in an integrated circuit, a resistor element is formed into a spiral shape, and its center portion is connected to a high electric potential while its circumferential portion is connected to the ground electric potential. The resistor element having such a spiral shape is created in an active area.
In Japanese Patent Laid-open No. Hei 9(1997)-186315, on the other hand, there is disclosed an insulated gate bipolar transistor (IGBT) for use in an inverter for reducing a drop in strength to withstand a voltage. This reference discloses typical creation of an over-voltage-suppressing diode by providing an FLR (Field Limiting Ring) on the surface portion of a semiconductor substrate (drift layer) on the circumference (periphery area) of a semiconductor chip and creating the diode on the drift layer with an oxide film sandwiched between the drift layer and the diode. In this example, distribution of electric potentials is optimized to suppress a drop in strength to withstand a voltage by making the device dimensions of the FLR equal to 4/5 times the device dimensions of the over-voltage-suppressing diode.
SUMMARY OF THE INVENTION
Nowadays, the alternating-current voltage of the commercial power supply varies from country to country. For example, the alternating-current voltage in Japan is 100 V or 200 V while the voltage is 115 V in the US and 220 V to 240 V in Europe.
A switching regulator has a main switch and a starter circuit for activating the main switch. The starter circuit comprises a starter switch and a start resistor (a resistor element).
In a switching regulator connected to a direct-current power supply operating by rectification of a 240V alternating-current input, a transistor requires a maximum withstand voltage of about 700 V. In order to deliver the switching regulator as a product assuring this maximum withstand voltage, it is necessary to set a design value of the main switch and the starter switch at about 750 V.
A breakdown of any of transistors comprising the main and starter switches is caused by a high voltage applied to the transistor. It is desirable to devise such main and starter switches that an inevitable breakdown occurs on a portion other than the surface of a device with a large area. Concretely, it is desirable to avoid a breakdown of a start resistor element which has a small area and is prone to a breakdown occurring on the surface. However, it is inevitable to have a breakdown occur in a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) and a power MISFET (Metal Insulator Semiconductor Field Effect Transistor), which have a large area and are difficult to fall into a state of breakdown occurring on the surface. Thus, if the withstand voltage of a power MISFET is set in the range 750 V to 800 V, it will be desirable to set the withstand voltage of a start resistor at a value of at least 800 V.
Since there is no case in which a start resistor with such a withstand voltage of at least 800 V is included in an integrated circuit, however, it is necessary to launch new developments.
The inventor of the present invention studied the creation of a resistor into a spiral shape as is disclosed in the reference cited above. In an experiment conducted as part of the study, the inventor discovered a phenomenon in which, as the voltage applied to the resistor element increases, its resistance decreases, allowing a large current to flow. Further, since the resistor element is formed in an active region of a semiconductor substrate in which IC is formed, the IC chip increases in size and manufacturing cost increases. In dependence on the layout of the resistor element, a parasitic interaction with another device adjacent to the resistor element may probably occur.
In order to solve the problems described above, the inventor of the present invention has proposed a configuration wherein a resistor element having a zigzag shape is provided on a field insulation layer created on a periphery area of a semiconductor chip in a direction from the center of the semiconductor chip to the circumference thereof and has proposed a technology of preventing the field insulation layer from breaking down due to application of a high voltage. The zigzag portion is extended to cross each ring portions of a plurality of FLRs enclosing an active area of the semiconductor chip in a multiplexed state.
In such a resistor element having a zigzag shape, however, the following problems have been identified. FIGS.
26
(
a
) to
26
(
c
) are diagrams showing results of an analysis of an already proposed technology. To be more specific, FIG.
26
(
a
) shows a model of a zigzag pattern of a resistor layer used as a start resistor SR. FIG.
26
(
b
) shows a cross section of a portion including a resistor layer and FLRs of a driving power IC. FIG.
26
(
c
) shows graphs representing the electric potential of a resistor layer and the electric potential of a semiconductor substrate surface including an FLR. It should be noted that, while 5 FLRs P
1
to P
5
are described in this analytical study, the number of FLRs is not limited to 5.
In other words, FIG.
26
(
b
) is a diagram showing a cross section of a periphery portion of a semiconductor chip in which a driving power IC is created. The figure shows a semiconductor substrate
1
made of n
+
silicon with an n
−
epitaxial layer
2
created on the main surface thereof.
In the semiconductor chip, a periphery area is located on the periphery of the semiconductor substrate's active area in which devices such as transistors are created. On the main surface of the epitaxial layer
2
of this periphery area, a field insulation film
3
made of LOCOS (Local Oxidation of Silicon) is created. On the main surface of the semiconductor substrate of the periphery area, that is, on the main surface of the epitaxial layer
2
, five field limiting rings (FLRs)
13
are created, enclosing the active area not shown in the figure. Made of a p diffusion layer, the five FLRs
13
are distinguished from each other by assigning reference notations P
1
to P
5
thereto respectively. It should be noted that a p diffusion layer P
0
held at the electric potential GND of the ground is created on the inner side of the FLR P
1
.
In addition, on the edge of the semiconductor chip, a guard ring
14
is provided. To be more specific, the guard ring
14
is created on
Nakazawa Yoshito
Yamauchi Shunichi
Yatsuda Yuji
Mattingly Stanger & Malur, P.C.
Munson Gene M.
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