Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With peripheral feature due to separation of smaller...
Patent
1993-05-06
1994-08-16
Crane, Sara W.
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With peripheral feature due to separation of smaller...
257707, 257706, 257720, 437226, H01L 2302
Patent
active
053389670
ABSTRACT:
A semiconductor chip includes a semiconductor substrate having opposite front and rear surfaces and an active element on the front surface and a supporting substrate supporting the semiconductor substrate and disposed on the rear surface of the semiconductor substrate. The supporting substrate includes a radiating layer for radiating heat generated by the active element and disposed on a part of the rear surface of the semiconductor substrate directly opposite said active element and a plated metal layer of Rh, Pt, or Ni-B-W having a linear thermal expansion coefficient approximately equal to that of the semiconductor substrate and disposed on part of the rear surface of the semiconductor substrate but not directly opposite the active element. In this structure, the curvature of the chip during die-bonding is reduced. The plated metal layer is produced in a relatively simple process with no difficulty in controlling the composition of a plating solution. As a result, a semiconductor chip having improved heat radiation and RF characteristics is achieved.
REFERENCES:
patent: 3940295 (1976-02-01), Lupton et al.
patent: 4376287 (1983-03-01), Sechi
patent: 4897508 (1990-01-01), Mahulikar et al.
patent: 5015803 (1991-05-01), Mahulikar et al.
patent: 5138439 (1992-08-01), Kobiki
Crane Sara W.
Guay John F.
Mitsubishi Denki & Kabushiki Kaisha
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