Semiconductor device, semiconductor package, and method for...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices

Reexamination Certificate

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C257S685000, C257SE25013

Reexamination Certificate

active

08080873

ABSTRACT:
A semiconductor device designed to facilitate testing. Superimposed first and second semiconductor chips each include a plurality of internal terminals, an external terminal, and a plurality of transistors. A plurality of wires connect the internal terminals, the transistors, and the external terminals of the first and second semiconductor chips in series.

REFERENCES:
patent: 5528083 (1996-06-01), Malladi et al.
patent: 6441669 (2002-08-01), Ooishi
patent: 6473321 (2002-10-01), Kishimoto et al.
patent: 6476506 (2002-11-01), O'Connor et al.
patent: 6831502 (2004-12-01), Oishi
patent: 2001/0000013 (2001-03-01), Lin
patent: 2002/0171451 (2002-11-01), Hamano et al.
patent: 2003/0197515 (2003-10-01), Ishigaki
patent: 10-027026 (1998-01-01), None
patent: 2003-185710 (2003-07-01), None
patent: 2003-309183 (2003-10-01), None

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