Semiconductor device pattern generation

Details Semiconductor device pattern generation Semiconductor device pattern generation

2006-06-06

2009-06-09

Lin, Sun J (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

07546573

ABSTRACT:
In one embodiment, a computer system a processor and a memory module comprising logic instructions stored on a computer readable medium which. When executed, the logic instructions configure a processor to create a reticle pattern for use in a lithography process, apply an orthogonalization process to the reticle pattern to create an orthogonalized reticle pattern, and use the orthogonalized reticle pattern in an optical proximity correction process.

REFERENCES:
patent: 5316896 (1994-05-01), Fukuda et al.
patent: 5644390 (1997-07-01), Yasuzato
patent: 5792596 (1998-08-01), Yasuzato et al.
patent: 6081658 (2000-06-01), Rieger et al.
patent: 6187483 (2001-02-01), Capodieci et al.
patent: 6310679 (2001-10-01), Shiraishi
patent: 7295695 (2007-11-01), Dayal
patent: 2002/0123866 (2002-09-01), Lin
patent: 2003/0071262 (2003-04-01), Weiner
patent: 2003/0140330 (2003-07-01), Tanaka et al.
patent: 2004/0088149 (2004-05-01), Cobb
patent: 2005/0008949 (2005-01-01), Dulman
patent: 2006/0057475 (2006-03-01), Liebmann
patent: 2006/0170617 (2006-08-01), Latypov et al.
patent: 2006/0200790 (2006-09-01), Shang et al.
patent: 2006/0277520 (2006-12-01), Gennari

Affiliated with

Also associated with

Rating

Semiconductor device pattern generation does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor device pattern generation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device pattern generation will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4112936