Semiconductor device package structure

Details Semiconductor device package structure Semiconductor device package structure

2000-07-14

2002-11-19

Talbott, David L. (Department: 2827)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

Small lead frame for connecting a large lead frame to a...

C257S676000, C257S684000, C257S690000, C257S692000, C257S784000, C257S787000, C438S112000, C438S123000, C438S124000, C438S127000, C361S723000, C361S773000, C361S813000

Reexamination Certificate

active

06483178

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to semiconductor device packaging technology, and more particularly, to a semiconductor device package structure which allows the encapsulation body to be highly secured in position to the leads, making the encapsulation body hardly delaminated from the leads.
2. Description of Related Art
QFN (Qaud Flat Non-leaded) is an advanced semiconductor device packaging technology that allows a semiconductor device package to be made very compact in size.
FIG. 1
is a schematic sectional diagram of a conventional QFN package structure. As shown, the QFN package structure includes a die pad
1
; a semiconductor chip
2
mounted on the die pad
1
; a lead portion
3
having a plurality of leads (only part is shown in the sectional view of
FIG. 1
) around the die pad
1
; a set of bonding wires
4
for electrically coupling the semiconductor chip
2
to the lead portion
3
; and an encapsulation body
5
which encapsulates the semiconductor chip
2
and the bonding wires
4
while exposing the outer part
3
a
and the bottom surface
3
b
of the lead portion
3
. This QFN package structure differs from conventional QFP (Quad Flat Package) in that it uses the bottom surface
3
b
of the lead portion
3
for electrically bonding to printed circuit board (not shown) rather than using external pins. This benefit allows the QEN type of packages to be made smaller in size than the QFP type by about 60%. Moreover, the non-leaded design of the QFN package structure allows a more shortened signal transmission line than the QFP type, so that it allows a higher performance to the semiconductor chip enclosed therein.
FIG. 2
is a schematic sectional diagram of another conventional QFN package structure. As shown, this QFN package structure is characterized in that the bottom surface of the die pad
1
′ is exposed to the outside of the encapsulation body
5
for the purpose of providing the semiconductor chip
2
with a direct heat-dissipation path to the atmosphere.
One drawback to the forgoing two kinds of QFN package structures, however, is that since the lead portion
3
has its outer part
3
a
and the bottom surface
3
b
of the lead portion
3
exposed to the outside of the encapsulation body
5
, the encapsulation body
5
would be easily delaminated from the lead portion
3
. Moreover, during singulation process, the cutting force would even cause the lead portion
3
to break apart from the encapsulation body
5
, which would adversely degrade the quality and reliability of the finished package product.
One solution to the foregoing problem is to form a bolting hole
6
in the upper surface of the lead portion
3
, as illustrated in
FIGS. 1 and 2
, through, for example, etching. This allows the encapsulation body
5
to have one part filled in the bolting hole
6
, thereby providing a bolting effect to the entire encapsulation body
5
, making the encapsulation body
5
less likely to be delaminated from the lead portion
3
.
One drawback to the forgoing solution, however, is that the resulted bolting effect is still unsatisfactory due to the reason that the lead portion
3
is very small in size so that it would not be able to provide really sufficient bonding strength to secure the encapsulation body
5
firmly in position.
SUMMARY OF THE INVENTION
It is therefore an objective of this invention to provide a new semiconductor device package structure which can help allow the encapsulation body to be highly secured to the lead portion so that it would be unlikely to be delaminated from the lead portion to allow the finished package product to be assured in quality and reliability.
In accordance with the foregoing and other objectives, the invention proposes a new semiconductor device package structure.
The semiconductor device package structure of the invention comprises a die pad; a semiconductor chip mounted on the die pad; a plurality of leads arranged around the die pad, each lead being formed with a bolting hole having a constricted middle part; a plurality of bonding wires for electrically coupling the semiconductor chip to the leads; and an encapsulation body which encapsulates the semiconductor chip and the bonding wires and includes a part filled in the bolting hole in each of the leads, while exposing an outer part and a bottom surface of each of the leads. The bolting hole has various embodiments that allow the encapsulation body to be highly secured in position to the lead portion, thereby making the encapsulation body hardly delaminated from the lead portion, allowing the finished package product to be highly assured in quality and reliability than the prior art.


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