Semiconductor device package having twice-bent tie bar and...

Details Semiconductor device package having twice-bent tie bar and... Semiconductor device package having twice-bent tie bar and...

1998-05-19

2001-05-08

Thomas, Tom (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

With structure for mounting semiconductor chip to lead frame

C257S666000, C257S670000, C257S669000, C257S696000, C257S674000, C257S672000, C257S692000

Reexamination Certificate

active

06229205

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device package, and more particularly to a semiconductor device package having a twice-bent tie bar and a small die pad, in order to prevent both imperfect encapsulation by the molding compound that forms the package body and any resulting damage to the die pad by the molding compound.
2. Description of the Related Art
There are continuing efforts to improve the reliability of the plastic package technology for encapsulating semiconductor devices. A main cause for the lack of reliability in the plastic packages has been that materials having different physical characteristics are in contact with each other. For example, differences in coefficient of thermal expansion among a molding compound which forms the package body, a semiconductor chip which is made of silicon (Si), and a lead frame which consists of copper (Cu) or iron (Fe) alloy, can cause separation of the materials during subsequent processing, testing, and use.
Generally, there are two approaches for improving the reliability of the package; one approach addresses the materials and the other approach addresses the processes. The material approach includes improving the adhesion strength of the molding compound that forms the package body, and selecting the coefficient of thermal expansion of the lead frame and molding compound to be the same as that of the semiconductor chip. The process approach includes increasing the area of direct contact between the molding compound and the surface of the semiconductor chip by forming a through hole in the center of a die pad on which the semiconductor chip is mounted, as disclosed in U.S. Pat. No. 4,942,452.
In the case of the lead frame having a die pad with a through hole in the center, it is difficult to use the same lead frame in packaging many various kinds of semiconductor chips. Therefore, in order to overcome this disadvantage, newer approaches use a small-sized die pad, i.e., a die pad having a smaller size than the size of the semiconductor chip. Then the molding compound can directly contact the bottom surface of the semiconductor chip extending beyond the outside edges of the die pad.
FIG. 1
is a cross-sectional view depicting a conventional semiconductor device package using a small-sized die pad. With reference to
FIG. 1
, a lead frame is composed of a die pad
10
on which a semiconductor chip
12
is mounted and a plurality of leads
14
for electrically connecting the semiconductor chip
12
to the external apparatus (not shown) by a plurality of bonding wires
16
. The semiconductor chip
12
is attached to the upper surface of the die pad
10
by an adhesive layer
15
. The package body
18
is formed around the chip
12
, leads
14
and bonding wires
16
by injecting a molding compound. Because the die pad
10
has a smaller size than that of the semiconductor chip
12
, the molding compound directly contacts the bottom surface of the outside edge of the semiconductor chip
12
extending beyond the die pad
10
. Therefore, the total adhesion strength between the semiconductor chip and the molding compound can be increased, and thereby, the reliability of the package can be improved. The small-sized die pad provides more flexibility in that the same lead frame can be used with many more kinds of semiconductor chips.
However, in the case of the lead frame having the small-sized die pad
10
, a space is formed between an upper surface of a tie bar (not shown), extending from either side of the die pad
10
into and out of the page as viewed in
FIG. 1
, and the lower surface of the semiconductor chip
12
. The height of this space, usually several microns (&mgr;m), is the same as the thickness of the adhesive layer
15
. In the specific case of an Ag-epoxy adhesive, the height of the space is about 6 &mgr;m to 8 &mgr;m.
This space can cause failures by, for example, the imperfect encapsulation of the molding compound which can leave voids in this space. Furthermore, the die pad can be warped during the molding process due to uneven filling of the molding compound, thus damaging the die pad.
In addition, the non-hermetic plastic package body absorbs moisture from the external environment through diffusion. As the moisture penetrates into the package body along the boundary between the tie bar and the package body, this moisture can cause package cracking. The moisture delaminates the package at the interface between the die pad and the molding compound due to the expansion and the contraction of the moisture during either the assembly process or the reliability test in which the semiconductor device is subjected to high temperature, high humidity, and high pressure conditions.
The reliability of packages for semiconductor devices is also affected by the increased number of inner leads encapsulated in the package. As the number of inner leads increases, and the size of the die pad decreases, the pitch between neighboring inner leads becomes more fine and the width of the inner leads and tie bar becomes thinner. All these factors increase the chance that the liquid molding compound injected to form the package body will deflect the inner leads or tie bar and cause electrical failures in the finished package.
Therefore, what is needed is a semiconductor package with increased reliability due to increased direct contact between the molding compound and the semiconductor chip without causing voids in the layer between the tie bar and the package body and without causing electrical failures by deflecting thinner tie bars and inner leads.
SUMMARY OF THE INVENTION
Accordingly, an object of the present invention is to provide a semiconductor device package that prevents imperfect encapsulation of a molding compound, damage to a die pad by the molding compound in the molding process, and package cracking by the diffusion of moisture through the boundary between the tie bar and the package body.
These and other objects and advantages of the present invention are achieved by a semiconductor device package comprising a die pad to which a semiconductor chip is vertically attached, having a smaller horizontal size than a horizontal size of the semiconductor chip. The package includes a plurality of inner leads which are electrically connected to the semiconductor chip and a plurality of outer leads, each of which is integral with a respective one of the plurality of inner leads. A package body encapsulates the semiconductor chip, the die pad, and the plurality of inner leads. A tie bar which supports the die pad, has a downward bend effecting a downward vertical displacement within the perimeter of the semiconductor chip an upward bend effecting an upward vertical displacement beyond the perimeter of the die pad.


REFERENCES:
patent: 4942452 (1990-07-01), Kitano et al.
patent: 5210307 (1993-05-01), Davis
patent: 5214307 (1993-05-01), Davis
patent: 5327008 (1994-07-01), Djennas et al.
patent: 5389739 (1995-02-01), Mills
patent: 5637913 (1997-06-01), Kajihara et al.
patent: 5698904 (1997-12-01), Tsuji
patent: 5859471 (1994-07-01), Kuraishi et al.
patent: 5-211271 (1993-08-01), None
patent: 7-235629B1 (1995-09-01), None

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