Semiconductor device package and method of die attach

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads

Reexamination Certificate

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Details

C257S738000, C257S778000

Reexamination Certificate

active

06525423

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates generally to semiconductor device packaging, and more particularly the invention relates to the attachment of a semiconductor die to a package using high thermal conductivity epoxy.
Semiconductor integrated circuits and devices are mounted and hermetically sealed within a package. Wire bonds connect the semiconductor chip to electrical leads extending from the package. Typically, the chip is mounted to a surface of the package by a suitable epoxy. Heretofore, an automated dispensing machine places a serpentine pattern of epoxy on the package surface and then the chip is placed in pressure engagement with the epoxy to form a bond.
More recently, a high heat conductivity epoxy such as a metal filled epoxy has been employed to provide greater heat conductivity, especially for power devices. However, it has been discovered that uneven spacing of the bottom surface of the die, which is often metal plated, from the metal surface of the package, can adversely effect both heat dissipation and electrical characteristics. Further, the epoxy thickness can be either too thick or too thin for optimum device performance.
The present invention provides a package and method of die attach which improves both heat dissipation and other characteristics of the packaged device.
BRIEF SUMMARY OF THE INVENTION
In accordance with the invention, solid spacers are provided on the mounting surface of a package before the application of epoxy. Then when the semiconductor die is placed in the package in pressure engagement with the epoxy, the solid spacers provide an accurate registration of the bottom surface of the die to the mounting surface. A precise spacing of the die from the mounting surface is provided and eliminates any tilt of the chip and the surface.
In a preferred embodiment, a plurality of lengths of bonding wire, such as used in electrically connecting the chip to package leads, are laid on the mounting surface as spacers with the ends of the wires preferably bonded to the metal mounting surface to prevent movement. A high heat conductivity epoxy is then applied to the surface and over the wires, and the semiconductor chip is then brought into pressure engagement with the epoxy and with the wires providing stops. The chips are then accurately positioned on the package mounting surface.
The method of die attach in accordance with the invention is consistent and repeatable in providing uniform spacing of dies in packages.
The invention and objects and features thereof will be more readily apparent from the following detailed description and appended claims when taken with the drawings.


REFERENCES:
patent: 5186383 (1993-02-01), Melton et al.
patent: 6133637 (2000-10-01), Hikita et al.
patent: 6303998 (2001-10-01), Murayama

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