Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Patent
1998-10-12
2000-08-15
Elms, Richard
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
438160, 438626, 438656, M01L 2100, M01L 214763
Patent
active
061035572
ABSTRACT:
First through fourth film formation chambers PC1 to PC4 are disposed in the periphery of a transfer chamber TC. If, for example, the ratio of the time required to form gate insulating films to the time required to form the silicon film as a semiconductor film is 1:3, a silicon nitride film and silicon oxide film are formed in the first through third film formation films PC1 to PC3 to become gate insulating films, and an amorphous silicon layer is formed in the fourth film formation chamber PC4 to become an active region. This makes it possible to perform formation of the amorphous silicon layer, which requires film cleaning, in a film formation chamber different from the film formation chamber for other films, and to manufacture thin-film transistors at high productivity.
REFERENCES:
patent: 5243202 (1993-09-01), Mori et al.
patent: 5352291 (1994-10-01), Zhang et al.
patent: 5527567 (1996-06-01), Desu et al.
patent: 5976989 (1999-11-01), Ishiguro et al.
Elms Richard
Lebentritt Michael S.
Sanyo Electric Co,. Ltd.
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