Semiconductor device n-channel type MOS transistor with gate...

Details Semiconductor device n-channel type MOS transistor with gate... Semiconductor device n-channel type MOS transistor with gate...

2006-12-08

2008-10-28

Geyer, Scott B. (Department: 2812)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

C438S530000, C257SE21177

Reexamination Certificate

active

07442632

ABSTRACT:
In a semiconductor device including a semiconductor substrate, and an n-channel type MOS transistor produced in the semiconductor substrate, the n-channel type MOS transistor includes a gate insulating layer formed on the semiconductor substrate and having a thickness of at most 1.6 nm, and a gate electrode layer on the gate insulating layer, and the gate electrode layer is composed of polycrystalline silicon which has an average grain size falling within a range between 10 nm and 150 nm in the vicinity of the gate insulating layer.

REFERENCES:
patent: 4697333 (1987-10-01), Nakahara
patent: 6596605 (2003-07-01), Ha et al.
patent: 6870224 (2005-03-01), Kanda et al.
patent: 2003/0047734 (2003-03-01), Fu et al.
patent: 2005/0236667 (2005-10-01), Goto et al.
patent: 2004-356520 (2004-12-01), None

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