Semiconductor device, method of generating pattern for...

Details Semiconductor device, method of generating pattern for... Semiconductor device, method of generating pattern for...

2006-06-13

2006-06-13

Whitmore, Stacy A. (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

07062732

ABSTRACT:
To provide a semiconductor device characterized in that: a decoupling capacitor can be increased; noise generated from an electric power supply can be effectively absorbed; and a stable operation of a circuit can be realized.Irrespective of whether or not a region is close to a power supply wiring or a ground wiring, MOS is spread all over a spare area of a chip and connected to a power supply wiring and ground wiring by utilizing a wiring layer and diffusion layer.

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patent: 2000-208634 (2000-11-01), None
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