Semiconductor device manufacturing with amorphous film...

Details Semiconductor device manufacturing with amorphous film... Semiconductor device manufacturing with amorphous film...

1996-03-27

2001-12-11

Bowers, Charles (Department: 2813)

Semiconductor device manufacturing: process

Formation of semiconductive active region on any substrate

Amorphous semiconductor

C438S097000

Reexamination Certificate

active

06329269

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of treating a semiconductor film and a method of fabricating a semiconductor device, and more particularly, it relates to a method of treating a semiconductor film of amorphous silicon or the like which can reduce impurity concentration and a method of fabricating a semiconductor device with the semiconductor film.
2. Description of the Background Art
In recent years, a semiconductor device employing a semiconductor layer of polycrystalline silicon which is much higher in carrier mobility than amorphous silicon has attracted much attention. Such a semiconductor device includes a thin film transistor (TFT).
A conventional method of fabricating a thin film transistor employing the so-called solid-phase epitaxy of obtaining a polycrystalline silicon film by epitaxially growing an amorphous silicon film in a solid phase. FIGS.
17
(
a
) to
17
(
e
) and
18
(
f
) to
18
(
i
) illustrate steps of fabricating a thin film transistor which is employed as a pixel driving element of a conventional liquid crystal display.
First, a quartz substrate
101
is prepared, as shown in FIG.
17
(
a
).
Then, an amorphous silicon film
102
is formed on the quartz substrate
101
by CVD (chemical vapor deposition) under conditions of a temperature of 500 to 600° C. and an SiH
4
flow rate of 50 sccm, as shown in FIG.
17
(
b
).
Further, the amorphous silicon film
102
is epitaxially grown in a solid phase in an atmosphere of nitrogen gas which is inert gas, to obtain a polycrystalline silicon film
103
, as shown in FIG.
17
(
c
). The conditions for the solid-phase epitaxy are N
2
gas of 4 l/min., a temperature of 500 to 650° C., and a time of several hours to 100 hours.
Then, a gate insulating film
105
is formed on the polycrystalline silicon film
103
, as shown in FIG.
17
(
d
).
Further, a polycrystalline silicon film for defining a gate electrode
106
is formed on the gate insulating film
105
by thermal CVD, as shown in FIG.
17
(
e
). A heat treatment is performed in an N
2
atmosphere at a temperature of 1050° C. for 60 minutes, and thereafter the polycrystalline silicon film is patterned to form the gate electrode
106
. This gate electrode
106
may alternatively be prepared from a metal such as aluminum (Al) or chromium (Cr), by vapor deposition or sputtering.
Thereafter holes
107
are formed in the gate insulating film
105
by anisotropic etching, as shown in FIG.
18
(
f
). An n-type impurity
108
such as phosphorus (P) is doped by ion implantation or the like, and thereafter a heat treatment is performed in an N
2
atmosphere at a temperature of 900° C. for 30 minutes, for forming n-type drain and source regions
109
and
110
in the polycrystalline silicon film
103
.
Further, a storage capacitive electrode
111
consisting of ITO (indium tin oxide) or the like is formed on a pixel part region of the quartz substrate
101
by sputtering, as shown in FIG.
18
(
g
).
Further, a gate electrode
112
consisting of a metal such as molybdenum (Mo), metal silicide or polycrystalline silicon is formed on the gate electrode
106
by sputtering, as shown in FIG.
18
(
h
). Further, an interlayer insulating film
113
consisting of silicon nitride or the like is formed on the overall surface, and the interlayer insulating film
113
is partially removed by etching or the like, for forming contact holes
114
on the drain and source regions
109
and
110
.
Thereafter a pixel electrode
115
consisting of ITO is formed on the interlayer insulating film
113
located on the pixel part by sputtering, as shown in FIG.
18
(
i
). The pixel electrode
115
is electrically connected with the source region
110
through the contact hole
114
. Further, a conductive film is formed on the overall surface and patterned, thereby forming a drain electrode
116
and a source electrode
117
which are connected to the drain region
109
and the source region
110
respectively.
Through the aforementioned steps, a polycrystalline silicon TFT serving as a pixel driving element of a liquid crystal display (LCD) is completed.
As hereinabove described, the conventional TFT employs a polycrystalline silicon film which is formed by solid-phase epitaxy under an inert gas atmosphere as an active layer. When solid-phase epitaxy of the amorphous silicon film is made in an atmosphere of inert gas such as nitrogen gas, however, the surface of the polycrystalline silicon film is extremely irregularized.
FIG. 19
is a characteristic diagram showing surface roughness of a polycrystalline silicon film which is formed from an amorphous silicon film prepared from silane (SiH
4
) gas through AFM (atomic force microscopy). As shown in
FIG. 19
, the mean surface roughness of the polycrystalline silicon film is 4.85 Å while the maximum irregularity (difference between maximum and minimum values) is 19.5 Å. Thus, it is understood that the surface is extremely stepped. When such a polycrystalline silicon film is employed as an active layer of a thin film transistor, carriers are disadvantageously scattered by the irregular surface of the polycrystalline silicon film, to deteriorate drivability of the thin film transistor.
To this end, there has been studied a method of polishing such an irregular surface of the polycrystalline silicon film (Appl. Phys. Lett., Vol. 64, No. 17, pp. 2273-2275, Apr. 25, 1994).
According to this method, an amorphous silicon film is formed on an SiO
2
film, which is formed by thermal oxidation, by low pressure CVD, and converted into a polycrystalline silicon film. Then the surface of the polycrystalline silicon film is flattened by mechanical or chemical polishing, and thereafter the flattened polycrystalline silicon film is employed as an active layer of a TFT.
In order to carry out the mechanical or chemical polishing, however, an expensive machine is necessary and sufficient care is required for maintenance/management of the polishing machine for continually maintaining the machine in the same condition. Thus, the fabrication cost is disadvantageously increased.
Further, the polycrystalline silicon film which is formed by the aforementioned method contains an impurity such as oxygen. It is preferable to minimize the concentration of such an impurity, which causes crystal defects etc. in the film. However, it is known in the art that reduction of impurity concentration such as oxygen concentration is limited in a fabrication process employing the present film forming device such as a CVD device, for example, and that reduction of oxygen concentration is particularly difficult. For example, the lower limit of reduction in oxygen concentration during film formation is about 10
19
cm
−3
in a plasma CVD device, an LP-CVD (low pressure CVD) device or the like. Therefore, a polycrystalline silicon film which is obtained by solidphase epitaxy after formation of an amorphous silicon film contains a large quantity of oxygen which is an impurity, and the characteristics of a TFT are deteriorated by crystal defects resulting from the presence of oxygen.
SUMMARY OF THE INVENTION
A first object of the present invention is to provide a method of fabricating a semiconductor device which can smooth the surface of a semiconductor film crystallized from an amorphous state.
A second object of the present invention is to provide a method of treating a semiconductor film which can reduce impurity concentration in the semiconductor film and a method of fabricating a semiconductor device.
A method of fabricating a semiconductor device according to a first aspect of the present invention comprises the step of forming a polycrystalline silicon film by supplying external energy in an atmosphere containing gas which contains at least one oxygen.
According to the first aspect, the external energy is preferably supplied by solid-phase epitaxy or melt recrystallization.
In a preferred embodiment according to the first aspect, the method comprises the steps of forming an amorphous silicon film on a semico

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