Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Combined with the removal of material by nonchemical means
Reexamination Certificate
2002-09-06
2003-09-02
Potter, Roy (Department: 2822)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Combined with the removal of material by nonchemical means
C438S459000
Reexamination Certificate
active
06613694
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a manufacturing method for the same and, more particularly, to a package of the semiconductor device.
2. Description of the Related Art
In recent years, with the increasing mounting density of semiconductor devices, chip-size packages or similar types of semiconductor devices are drawing attention.
Hitherto, as such a type of chip-size packages, one shown in
FIG. 9
has been available. A semiconductor device shown in
FIG. 9
has electrode pads
2
formed on a semiconductor element
1
having a thickness of 400 &mgr;m, and posts
3
composed of copper or the like electrically connected to the electrode pads
2
are formed thereon. The surface of the semiconductor element and the posts
3
are sealed by a resin
4
that is approximately 100 &mgr;m thick. Bumps
5
composed of solder or the like are formed on the posts
3
exposed on a resin surface.
Referring to
FIG. 10
, a manufacturing method for a conventional semiconductor device will be described.
Posts
101
made of copper or the like are formed on a wafer
100
, which is a semiconductor substrate as illustrated in
FIG. 10-A
. In this state, a resin
102
is charged to cover the entire wafer as illustrated in
FIG. 10-B
. The entire surface is polished until the posts
101
are exposed on the surface as illustrated in
FIG. 10-C
. Then, bump electrodes
103
made of solder or the like are formed on the surfaces of the posts
101
as illustrated in
FIG. 10-D
. Lastly, the wafer is cut and divided into individual semiconductor devices as illustrated in
FIG. 10-E
.
The conventional structure and manufacturing method have been posing problems including one in which a crack occurs at a junction between a semiconductor element and a mounting substrate due to thermal stress when mounting a semiconductor device on a printed board or the like (refer to FIG.
11
). In the manufacturing method for the conventional semiconductor devices, if the stress of a sealing resin is high, then a wafer develops a warp when resin sealing is performed. A warped wafer is difficult to be fixed when dividing it into individual segments as shown in FIG.
12
.
SUMMARY OF THE INVENTION
To solve the problems mentioned above, a semiconductor device in accordance with the present invention has a semiconductor element having a thickness of 200 &mgr;m or less, an electrode pad formed on the semiconductor element, a post electrically connected to the electrode pad, and a sealing resin for sealing a surface of the semiconductor element whereon circuitry is formed and the post.
Furthermore, a manufacturing method for a semiconductor device in accordance with the present invention includes a step for forming an electrode pad on a main surface of a semiconductor wafer, a step for forming a post to be electrically connected to the electrode pad, a step for resin-sealing the main surface of the semiconductor wafer and the post, a step for forming a groove from a resin surface to a predetermined depth of the semiconductor wafer, and a step for polishing a rear surface of the semiconductor wafer to a bottom of the groove and dividing the semiconductor wafer into individual semiconductor devices.
A mounting method for a semiconductor device in accordance with the present invention includes a step for preparing a semiconductor device in which a main surface of a semiconductor element having a thickness of 200 &mgr;m or less has been resin-sealed, a step for disposing the semiconductor device on a mounting substrate, and a step for connecting the semiconductor device and the mounting substrate by heat treatment.
REFERENCES:
patent: 6060373 (2000-05-01), Saitoh
patent: 6159837 (2000-12-01), Yamaji et al.
patent: 5-335411 (1993-12-01), None
patent: 10-79362 (1998-03-01), None
Ohuchi Shinji
Shiraishi Yasushi
Oki Electric Industry Co. Ltd.
Potter Roy
Volentine & Francos, PLLC
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