Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2001-02-28
2002-11-26
Nguyen, Tuan H. (Department: 2813)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S627000, C438S643000, C438S678000, C438S648000, C438S685000
Reexamination Certificate
active
06486063
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device manufacturing method and, more particularly, to a semiconductor device manufacturing method using a tungsten-based material to form an underlying film for a copper interconnection.
In order to realize a high degree of integration and high speed in a semiconductor integrated circuit, various improvements have been proposed. As the interconnection width and interconnection interval are decreased, the interconnection delay adversely affects the circuit performance and the interconnection causes electromigration, leading to a serious decrease in reliability. Some signal delay due to the interconnection is caused by the interconnection resistance.
Some signal delay is caused by the interconnection capacitance among the interconnections integrated at a high density. To decrease the interconnection capacitance that causes signal delay, the interconnection must be micropatterned not only in the lateral direction but also in the direction of thickness. Therefore, when the signal delay caused by the interconnection capacitance is to be suppressed, the current flowing through the interconnection increases, which tends to cause electromigration.
In order to solve this problem, copper with a lower electric resistance has been replacing aluminum to form an interconnection.
When copper is used as the interconnection material, it is diffused in the silicon oxide to adversely affect the transistor element. Also, a copper interconnection has poor adhesion properties with respect to an insulating film.
For this reason, when using copper as the interconnection material, an underlying film is generally used to prevent copper diffusion and to improve the adhesion properties between the interconnection and insulating film (interlevel insulating film).
A conventional interconnection structure forming method using copper will be described in detail with reference to
FIGS. 6A
to
6
D. In this case, a copper interconnection forming method in accordance with the so-called damascene will be described.
First, as shown in
FIG. 6A
, an interlevel insulating film
902
is formed on a silicon substrate
901
having elements such as a MOS transistor (not shown), and a trench
903
is formed at its predetermined portion.
As shown in
FIG. 6B
, an underlying film
904
for copper diffusion prevention described above and the like is formed on the interlevel insulating film
902
including the bottom and side surfaces of the trench
903
.
Copper is formed on the underlying film
904
to fill the trench
903
and to form a film that covers the entire surface of the underlying film
904
, thereby forming a metal layer
905
, as shown in FIG.
6
C. This copper film formation is performed by, e.g., plating.
Subsequently, the metal layer
905
on the interlevel insulating film
902
, which is above the trench
903
, and the underlying film
904
are removed by, e.g., chemical-mechanical polishing to form an underlying film
904
a
on the side and bottom surfaces of the trench
903
, and a copper interconnection
905
a
is formed through the underlying film
904
a,
as shown in FIG.
6
D.
Tungsten nitride is regarded as a promising material to form the underlying layer for the following reason. An underlying film must be formed on a three-dimensional surface with a trench and the like with a good step coverage. In the above case, the underlying film must be formed with a thickness as uniform as possible not only on the bottom but also on the side surface of the trench. Therefore, a material that can be formed by chemical vapor deposition (CVD) to provide a good step coverage is suitable to form the underlying film. From the above viewpoint, tungsten nitride described above, which can be formed by CVD and have good barrier characteristics to suppress copper diffusion attracts attention as the underlying film material.
Although tungsten nitride has a good step coverage and good copper diffusion suppressing performance (barrier characteristics), as described above, it has poor adhesion properties with respect to an insulating film used as the interlevel insulating film.
SUMMARY OF THE INVENTION
It is, therefore, the principal object of the present invention to provide semiconductor device manufacturing method which, when a copper interconnection material is placed in a trench through an underlying film, improves adhesion properties with respect to an interlevel insulating film while maintaining the good step coverage and barrier characteristics of a tungsten-based material.
In order to achieve the above object, according to the present invention, there is provided a semiconductor device manufacturing method comprising the steps of forming an interlevel insulating film on a semiconductor substrate, forming a trench in the interlevel insulating film, forming a first thin film made of a tungsten-based material by thermal chemical vapor deposition to cover a bottom surface and side surface of the trench, forming a second thin film made of a tungsten-based material by thermal chemical vapor deposition on an entire region on the first thin film, and filling an interconnection material comprised of copper in the trench, wherein the first thin film is formed in accordance with thermal chemical vapor deposition by supplying a tungsten source gas and the other source gas such that the other source gas is supplied in an amount larger than that of the tungsten source gas, and the second thin film is formed in accordance with thermal chemical vapor deposition by increasing a content of the tungsten source gas to be larger than that of the other source gas in formation of the first thin film.
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Wei-Yung Hsu et al., “Trench Fill with Low Pressure Long T hrow Sputtering and the Microstructure of Damasceme-Fabricated Cu Interconnects”, Proc. O f Advanced Metallization Conference, pp. 167-168 (1997).
Kawano Yumiko
Yamasaki Hideaki
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Nguyen Thanh
Nguyen Tuan H.
Tokyo Electron Limited
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