Semiconductor device manufacturing method

Details Semiconductor device manufacturing method Semiconductor device manufacturing method

1996-10-29

1999-02-16

Jones, Deborah

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

438698, H01L 21302

Patent

active

058720600

ABSTRACT:
A semiconductor manufacturing method for devices, such as a DRAM, having a plurality of circuit elements of at least two substantially different heights (such as memory-cells vs. peripheral circuits) on a common semiconductor substrate. A plurality of circuit elements of at least two substantially different heights are formed on a common semiconductor substrate. A common insulating layer, such as BPSG, whose top surface has substantial variation in height above the substrate, is deposited over the circuit elements. A resist mask layer is deposited over the insulating layer with openings over high portions of the insulating layer's top surface exceeding a first predetermined height. Then the insulating layer's high portions are etched down to a second predetermined height to make its overall top surface more even, and the resist mask layer removed. The enables a working layer that would be easily damaged by substantial height variation to be deposited on the evened insulating layer.

REFERENCES:
patent: 3976524 (1976-08-01), Feng
patent: 4666553 (1987-05-01), Blumenfeld et al.
patent: 4789646 (1988-12-01), Davis
patent: 4799992 (1989-01-01), Rao et al.
patent: 4983545 (1991-01-01), Gokan et al.

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