Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1992-01-10
1993-09-28
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Data refresh
365226, G11C 1300
Patent
active
052491552
ABSTRACT:
An n channel driver circuit comprised of an N channel MOS transistor is provided in parallel to a driver circuit comprised of a P channel MOS transistor. Normally, n channel driver circuit supplies an internal supply voltage, to activate driver circuit only at the time of current peak. Thus, an insufficient capability of n.sup.- channel driver circuit to supply current is supplemented.
REFERENCES:
"On-Chip Supply Voltage Conversion System and Its Application to a 4Mb DRAM", Extended Abstracts of the 8th (1986 International) Conference on Solid State Devices and Materials, Tokyo, pp. 307-310, Watanabe et al.
"Dual-Operating-Voltage Scheme for a Single 5-V 16-Mbit DRAM", IEEE Journal of Solid State Circuits, vol. 23, No. 5, Oct. 1988, pp. 1128-1132, Masashi Horiguchi.
Arimoto Kazutami
Asakura Mikio
Hayashikoshi Masanori
Hidaka Hideto
Kawai Shinji
Fears Terrell W.
Mitsubishi Denki & Kabushiki Kaisha
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