Semiconductor device including semiconductor memory element...

Active solid-state devices (e.g. – transistors – solid-state diode – Including region containing crystal damage

Reexamination Certificate

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C257SE29108, C438S459000

Reexamination Certificate

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07459767

ABSTRACT:
A wafer, in which a plurality of rectangular regions are defined on the face of the wafer by streets arranged in a lattice pattern, and a semiconductor memory element is disposed in each of the rectangular regions, is divided along the streets to separate the rectangular regions individually, thereby forming a plurality of semiconductor devices. Before the wafer is divided along the streets, a strained layer having a thickness of 0.20 μm or less, especially 0.05 to 0.20 μm, is formed in the back of the wafer. The strained layer is formed by grinding the back of the semiconductor wafer by a grinding member formed by bonding diamond abrasive grains having a grain size of 4 μm or less by a bonding material.

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Pei, Z.J. “A Study on Surface Grinding of 300 mm Silicon Wafers.” Int. J. Machine Tools & Manu., vol. 42 (2002): pp. 385-393.
Pei, Z.J., et. al. “Grinding Induced Subsurface Cracks in Silicon Wafers.” Int. J. Machine Tools & Manu., vol. 39 (1999): pp. 1103-1116.
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