Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – With lattice constant mismatch
Patent
1997-05-30
1999-06-01
Jackson, Jr., Jerome
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
With lattice constant mismatch
257 13, 257 96, 257 97, 257103, 372 44, 372 50, H01L 3300, H01L 310304
Patent
active
059090405
ABSTRACT:
A semiconductor device comprises a single crystal substrate, a nucleus formation buffer layer formed on the single crystal substrate, and a lamination layer including a plurality of Al.sub.1-x-y Ga.sub.x In.sub.y N (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1, x+y.ltoreq.1) layers laminated above the nucleus formation buffer layer. The nucleus formation buffer layer is formed of Al.sub.1-s-t Ga.sub.s In.sub.t N (0.ltoreq.s.ltoreq.1, 0.ltoreq.t.ltoreq.1, s+t.ltoreq.1) and formed on a surface of the substrate with an average film thickness of 5 nm to 20 nm such that the nucleus formation buffer layer has a number of pinholes for control of polarity and formation of nuclei. The pinholes are formed among loosely formed small crystals of Al.sub.1-s-t Ga.sub.s In.sub.t N (0.ltoreq.s.ltoreq.1, 0.ltoreq.t.ltoreq.1, s+t.ltoreq.1).
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Hatano Ako
Ohba Yasuo
Jackson, Jr. Jerome
Kabushiki Kaisha Toshiba
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