Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2002-03-11
2004-05-18
Clark, Sheila V. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S758000
Reexamination Certificate
active
06737744
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATION
This invention is based on and claims priority of Japanese patent application 2001-291013, filed on Sep. 25, 2001, the whole contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1) Field of the Invention
The present invention relates to semiconductor devices and manufacturing methods therefor, and more particularly, relates to a semiconductor device including a porous insulating film disposed between wire layers, that is, used as a via layer, and to a manufacturing method therefor.
2) Description of the Related Art
In semiconductor integrated circuit devices, parasitic capacitance between wires has been one of significant causes for decreasing signal transmission speeds. When the distance between wires is 1 &mgr;m or more, the parasitic capacitance between the wires has a small influence on processing speed of the entire device. However, when the distance between wires is 0.2 &mgr;m or less, the distance between wires formed in the same layer becomes extremely small compared to the distance between upper and lower wires, and as a result, the parasitic capacitance between wires has a significant influence on the processing speed of the device.
The transmission speed of signals passing through multilayer wires of semiconductor integrated circuit device is determined by the combination of wire resistance and parasitic capacitance. When the thickness of a wire is reduced, the parasitic capacitance can be reduced; however, when the thickness of a wire is reduced, the wire resistance is increased, and hence, a higher signal transmission speed cannot be obtained. In order to achieve a decrease in parasitic capacitance without decreasing the thickness of a wire, it is effective that the dielectric constant of an interlayer insulating film be decreased.
As a material having a low dielectric constant, a coating type insulating material, a polytetrafluoroethylene-based (PTFE-based) material, and a hydrocarbon-based material having a linear chain structure have drawn attention. As the coating type insulating material, a polyimide or a silicone resin may be mentioned by way of example. However, even when the material mentioned above is used, it is difficult to obtain a relative dielectric constant of 3 or less. When the PTFE based material is used, the dielectric constant can be decreased to 2 or less; however, the PTFE-based material cannot be practically used since it has poor adhesion to another material. The hydrocarbon-based material having a linear chain structure is susceptible to oxidation, and when it is oxidized, the dielectric constant thereof is likely to vary due to moisture absorption.
In order to solve the problems described above, a porous material having a low dielectric constant has been developed by forming a porous insulating material.
However, when a porous material was used as an insulating material, the inventors of the present invention discovered that problems, which did not occur in the past, arose during a process for manufacturing semiconductor devices.
SUMMARY OF THE INVENTION
Accordingly, an object of the present invention is to solve the problems that occur when a porous material is used as an insulating material for use in semiconductor integrated circuit devices.
In accordance with one aspect of the present invention, there is provided a method for manufacturing a semiconductor device comprising the steps of: forming a first insulating film on a surface of a substrate, a semiconductor element being formed thereon, and having a conductive area exposed at a part of the surface thereof; forming a first interlayer insulating film on the first insulating film; forming a second insulating film on the first interlayer insulating film; forming a third insulating film on the second insulating film; forming a second interlayer insulating film on the third insulating film; forming a wire trench from the upper surface of the second interlayer insulating film to an upper surface of the third insulating film and forming a via hole from a part of a bottom of the wire trench to an upper surface of the first insulating film, in which the via hole is disposed at a position corresponding to a part of the conductive area, and the wire trench is formed by etching under a condition in which the second interlayer insulating film is selectively etched with respect to the third insulating film; removing the third insulating film exposed at the bottom of the wire trench and the first insulating film exposed at the bottom of the via hole by etching under a condition in which the third insulating film is selectively etched with respect to the second insulating film; and filling a wire which comprises a conductive material in the via hole and the wire trench.
When the third insulating film exposed at the bottom of the wire trench is removed, the second insulating film may be used as an etching stopper film. Accordingly, the upper surface of the first interlayer insulating film is prevented from being exposed at the bottom of the wire trench. According to the method described above, a semiconductor device having the structure described below can be obtained.
In accordance with another aspect of the present invention, there is provided a semiconductor device comprising: a first insulating film provided on a surface of a substrate having a conductive area exposed at a part of the surface thereof; a first interlayer insulating film provided on the first insulating film; a second insulating film provided on the first interlayer insulating film; a via hole formed from an upper surface of the second insulating film to a bottom surface of the first insulating film; a third insulating film which is provided on the second insulating film and which has a different etching resistance from that of the second insulating film; a second interlayer insulating film which is provided on the third insulating film and which has a different etching resistance from that of the third insulating film; a wire trench which is provided from an upper surface of the second interlayer insulating film to the upper surface of the second insulating film and which is connected to the via hole at a part of the bottom of the wire trench; and a wire member which comprises a conductive material and is filled in the via hole and the wire trench.
In accordance with another aspect of the present invention, there is provided a method for manufacturing a semiconductor device comprising the steps of: forming a first insulating film which comprises a porous insulating material on a surface of a semiconductor substrate; forming a first etching stopper film which comprises an insulating material on the first insulating film; forming a second etching stopper film on the first etching stopper film, the second etching stopper film comprising another insulating material which has a higher dielectric constant than that of the first etching stopper film; forming a second insulating film on the second etching stopper film; forming a mask pattern having an opening on the second insulating film; forming a recess by etching the second insulating film under a condition in which the second insulating film is selectively etched with respect to the second etching stopper film using the mask pattern as an etching mask so that the second etching stopper film is exposed at a bottom of the recess; etching the second etching stopper film exposed at the bottom of the recess under a condition in which the second etching stopper film is selectively etched with respect to the first etching stopper film: and filling a conductive member which comprises a conductive material in the recess.
When the second etching stopper film is etched, since the first etching stopper film protects the first insulating film, the first insulating film is prevented from being exposed to an etching atmosphere. According to the method described above, a semiconductor device having the structure described below can be obtained.
In accordance with another aspect of the present invention, there is provided a sem
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