Semiconductor device including high voltage and low voltage...

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including high voltage or high power devices isolated from...

Reexamination Certificate

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C257S344000, C257S369000, C257S371000, C257S408000, C257S409000

Reexamination Certificate

active

07923805

ABSTRACT:
Methods and devices for forming both high-voltage and low-voltage transistors on a common substrate using a reduced number of processing steps are disclosed. An exemplary method includes forming at least a first high-voltage transistor well and a first low-voltage transistor well on a common substrate separated by an isolation structure extending a first depth into the substrate, using a first mask and first implantation process to simultaneously implant a doping material of a first conductivity type into a channel region of the low-voltage transistor well and a drain region for the high-voltage transistor well.

REFERENCES:
patent: 5498554 (1996-03-01), Mei
patent: 6365932 (2002-04-01), Kouno et al.
patent: 6451640 (2002-09-01), Ichikawa
patent: 6879007 (2005-04-01), Takamura
patent: 6884682 (2005-04-01), Lee
patent: 2001/0028065 (2001-10-01), Io
patent: 2003/0059983 (2003-03-01), Ota et al.
patent: 1135623 (2004-01-01), None
patent: 1263033 (2002-12-01), None
patent: 1020030009766 (2003-02-01), None
Chinese Office Action 200610171225.9 dated May 8, 2009.

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