Semiconductor device including ground and power-supply...

Details Semiconductor device including ground and power-supply... Semiconductor device including ground and power-supply...

2008-01-15

2010-10-19

Weiss, Howard (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Contacts or leads including fusible link means or noise...

C257S700000, C257SE23010, C361S762000

Reexamination Certificate

active

07816768

ABSTRACT:
A high dielectric loss tangent layer is provided in a dielectric layer between a power-supply plane and a ground plane. The high dielectric loss tangent layer is arranged such that its edge is located between the edge of the power-supply plane and the edge of the ground plane. The edge of the high dielectric loss tangent layer is preferably separated by a predetermined distance or more from the edge of the power-supply plane or the edge of the ground plane which is located on the inner side.

REFERENCES:
patent: 7102876 (2006-09-01), Lee et al.
patent: 7385286 (2008-06-01), Iwaki et al.
patent: 06-302760 (1994-10-01), None
patent: 7-335779 (1995-12-01), None
patent: 2000-183540 (2000-06-01), None
patent: 2001-111184 (2001-04-01), None
patent: 2003-60107 (2003-02-01), None
patent: 2005-129619 (2005-05-01), None
patent: 2006-140430 (2006-06-01), None
Japaense Office Action dated Oct. 22, 2008 with partial English translation.

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