Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With specified crystal plane or axis
Reexamination Certificate
2006-11-17
2010-02-23
Tran, Minh-Loan T (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With specified crystal plane or axis
C257S628000, C257S409000, C257SE29004, C257SE29136, C257SE29201
Reexamination Certificate
active
07667300
ABSTRACT:
A semiconductor device includes a transistor. The transistor includes a substrate having an inclined surface, a first upper surface extending from a lower portion of the inclined surface, and a second upper surface extending from an upper end of the inclined surface. A gate stack structure is formed on the inclined surface and includes a gate electrode. A first impurity region formed on one of the first and second upper surfaces contacts the gate stack structure. A second impurity region formed on the second upper surface contacts the gate stack structure. A channel between the first and second impurity regions is formed along the inclined surface in a crystalline direction.
REFERENCES:
patent: 6670694 (2003-12-01), Momose
patent: 2006/0049430 (2006-03-01), Kasai et al.
M. Yang et al. “High Performance CMOS Fabricated o Hybrid Substrate With Different Crystal Orientations”. 2003.
Cho Hans S.
Noguchi Takashi
Xianyu Wenxu
Yin Huaxiang
Zhang Xiaoxin
Harness & Dickey & Pierce P.L.C.
Samsung Electronics Co,. Ltd.
Tran Minh-Loan T
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