Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1998-11-23
2002-03-05
Lee, Eddie (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S351000, C257S347000, C257S349000, C257S501000, C257S506000
Reexamination Certificate
active
06353246
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to a semiconductor device that includes both silicon-on-insulator (SOI) and non-SOI devices.
BACKGROUND OF THE INVENTION
Semiconductor-on-insulator (SOI) technology relates to high-speed MOS and CMOS circuits. According to SOI, a thin layer of semiconductor material is implanted in an insulator to reduce the capacitive coupling between the semiconductor layer and the underlying substrate material.
SUMMARY OF THE INVENTION
The present invention provides a method for fabricating both SOI and non-SOI devices on a single semiconductor chip and a semiconductor device structure that includes both SOI and non-SOI devices on a single semiconductor chip.
In accordance with these and other objects and advantages, the present invention provides a semiconductor device structure. The structure includes a substrate including at least one silicon-on-insulator substrate region and at least one non-silicon-on-insulator region. The at least one silicon-on-insulator region and at least one non-silicon-on-insulator region are formed in a pattern in the substrate. At least one trench is arranged in the vicinity of at least at a portion of a boundary between a silicon-on-insulator substrate region and a non-silicon-on-insulator substrate region. The at least one trench is arranged in at least one of the silicon-on-insulator region and the non-silicon-on-insulator region.
Other aspects of the present invention provide a method for forming a semiconductor device structure. The method includes providing a substrate including at least one silicon-on-insulator region and at least one non-silicon-on-insulator region. At least one trench is provided arranged at least at a portion of a boundary between the silicon-on-insulator substrate region and the non-silicon-on-insulator substrate region.
Still other objects and advantages of the present invention will become readily apparent by those skilled in the art from the following detailed description, wherein it is shown and described only the preferred embodiments of the invention, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized, the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, without departing from the invention. Accordingly, the drawings and description are to be regarded as illustrative in nature and not as restrictive.
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Hannon Robert
Iyer Subramanian S.
Stiffler Scott R.
Winstel Kevin R.
Abate Esq. Joseph P.
Connolly Bove & Lodge & Hutz LLP
Fenty Jesse A.
International Business Machines - Corporation
Lee Eddie
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