Semiconductor device including anti-fuse circuit, and method...

Static information storage and retrieval – Read/write circuit – Having fuse element

Reexamination Certificate

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C365S200000, C365S201000

Reexamination Certificate

active

07952950

ABSTRACT:
An anti-fuse circuit according to the present invention includes an anti-fuse element that holds data in a nonvolatile manner and a latch circuit that temporarily holds data to be written to the anti-fuse element. The writing to the latch circuit can be performed in the order of nanoseconds, and thus, even when the defective addresses respectively different are written in a plurality of chips, a writing process to the latch circuit can be completed in a very short period of time. Thereby, an actual process for writing to the anti-fuse element can be performed in parallel for the chips, and as a result, the process for writing to the anti-fuse element can be performed at high speed.

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patent: 7159141 (2007-01-01), Lakhani et al.
patent: 7339848 (2008-03-01), Stansell et al.
patent: 7362159 (2008-04-01), Fukuda
patent: 2004/0148329 (2004-07-01), Ogasawara et al.
patent: 2006/0114052 (2006-06-01), Fukuda
patent: 2007/0097773 (2007-05-01), Nishioka et al.
patent: 10-075170 (1998-03-01), None
patent: 2004-227361 (2004-08-01), None
patent: 2006-147651 (2006-06-01), None

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