Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2001-07-12
2004-12-21
Wilczewski, Mary (Department: 2822)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S221000, C438S233000, C438S253000, C438S296000, C438S435000, C438S437000, C438S787000, C438S791000
Reexamination Certificate
active
06833310
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method for fabricating the same. More particularly, the present invention relates to a semiconductor device having a thin film formed by atomic layer deposition and a method for fabricating the same.
2. Description of the Related Art
As semiconductor devices become more highly integrated, the fabrication of such semiconductor devices becomes increasingly difficult. In particular, a thin film used in the fabrication of semiconductor devices, for example, a silicon oxide layer or a silicon nitride layer, must be formed to have an excellent step coverage at a low temperature. In order to meet these demands, a thin film is formed using low pressure chemical vapor deposition (CVD).
FIG. 1
illustrates a schematic diagram of an apparatus for forming a thin film by conventional low pressure chemical vapor deposition. Referring to
FIG. 1
, a boat
3
on which a plurality of wafers
2
(semiconductor substrates) are mounted and a boat support
9
for supporting the boat
3
are installed in an inner tube
1
in the apparatus for forming a thin film by conventional low pressure chemical vapor deposition. The inner tube
1
is enclosed by an outer tube
5
which in turn is partially enclosed by a heater
7
. A low pressure vacuum can be maintained inside the inner tube
1
and the outer tube
5
by a vacuum pump (not shown) connected to the lower right side of the inner tube
1
. A reactive gas flows into the lower left side of the inner tube
1
. At a temperature of 500~800° C. and a pressure of several Torr a thin film is formed on the wafers
2
. Then, an unreacted gas exhausts through the lower right side of the outer tube
5
by way of vacuum exhaustion. In
FIG. 1
, reference numeral
11
denotes an elevator for moving the boat
3
vertically, reference numerals
13
and
15
denote a vacuum manifold and a gas manifold, respectively, and reference numeral
17
denotes a vacuum flange.
However, the above mentioned apparatus for forming a thin film by low pressure chemical vapor deposition results in a high reaction temperature, and the thin film is formed on the plurality of wafers in a batch type, thereby increasing the thermal budget of the wafers.
Also, a process of consecutively forming a silicon oxide layer and a silicon nitride layer is widely used in fabricating the semiconductor device. The process of forming the silicon oxide layer and the silicon nitride layer must be separately performed in the apparatus for forming a thin film by conventional low pressure chemical vapor deposition, thereby causing an undesirable vacuum break.
SUMMARY OF THE INVENTION
To solve the above problems, it is a first feature of an embodiment of the present invention to provide a semiconductor device having a thin film formed by atomic layer deposition such that a low thermal budget is maintained and a vacuum break is prevented.
It is a second feature of an embodiment of the present invention to provide a method for fabricating a semiconductor device having a thin film formed by atomic layer deposition such that a low thermal budget is maintained and a vacuum break is prevented.
Accordingly, to provide the first feature, there is provided a semiconductor device. A trench is formed in a semiconductor substrate, and a liner layer is formed on the sidewalls and bottom of the trench. A buried insulating layer is filled in the trench, and a plurality of gate stack patterns are formed on the semiconductor substrate, and a plurality of gate spacers are formed on the sidewalls of the gate stack patterns. A first bubble prevention layer is formed of a multi-layer of a silicon oxide layer and a silicon nitride layer on the gate spacers by atomic layer deposition, and a first filling insulating layer is filled without a void between the gate stack patterns on the first bubble prevention layer. A plurality of bit line stack patterns are formed on the first filling insulating layer, and a plurality of bit line spacers are formed on the sidewalls of the bit line stack patterns. A second bubble prevention layer is formed of a multi-layer of a silicon oxide layer and a silicon nitride layer on the bit line spacers and on the bit line stack patterns by atomic layer deposition, and a second filling insulating layer is filled without a void between the bit line stack patterns on the second bubble prevention layer.
The liner layer, the gate spacers, the first bubble prevention layer, the bit line spacers, and the second bubble prevention layer, each is formed of a multi-layer of a silicon nitride layer and a silicon oxide layer or a multi-layer of a silicon oxide layer and a silicon nitride layer by atomic layer deposition.
In order to provide the second feature, there is provided a method for fabricating a semiconductor device. A trench is formed to a predetermined depth on a semiconductor substrate, and then, a liner layer formed of a multi-layer of a silicon nitride layer and a silicon oxide layer is formed on the sidewalls and bottom of the trench by atomic layer deposition. Subsequently, a buried insulating layer is formed in the trench without a void, and a plurality of gate stack patterns are formed on the semiconductor substrate in which the trench and the buried insulating layer are formed. Subsequently, a plurality of gate spacers are formed on the sidewalls of the gate stack patterns, and a first bubble prevention layer of a multi-layer of a silicon oxide layer and a silicon nitride layer is formed on the gate spacers and on the gate stack patterns by atomic layer deposition. Subsequently, a first filling insulating layer is formed without a void between the gate stack patterns on the first bubble prevention layer, and a plurality of bit line stack patterns are formed on the first filling insulating layer. Subsequently, a plurality of bit line spacers are formed on the sidewalls of the bit line stack patterns, and a second bubble prevention layer of a multi-layer of a silicon oxide layer and a silicon nitride layer is formed on the bit line spacers and on the bit line stack patterns by atomic layer deposition. Lastly, a second filling insulating layer is formed without a void between the bit line stack patterns on the second bubble prevention layer.
The liner layer, the gate spacers, the first bubble prevention layer, the bit line spacers, and the second bubble prevention layer, each is formed of a multi-layer of a silicon nitride layer and a silicon oxide layer or a multi-layer of a silicon oxide layer and a silicon nitride layer by atomic layer deposition.
As described above, the effect of each element formed of the multi-layer is different. For example, the liner layer, the first bubble prevention layer, and the second bubble prevention layer can form the buried insulating layer, the first filling insulating layer, and the second filling insulating layer, respectively without voids. The gate spacers and the bit line spacers have excellent step coverage, and thus can stabilize an etching selectivity between a material layer used to form the same spacers and a lower layer, for example, the etching selectivity between the semiconductor substrate and the first filling insulating layer, during etching for formation of the spacers. As a result, a thickness of the material layer required for forming a spacer is reduced, and accordingly, a loading capacitance is also reduced. The thermal budget of a semiconductor substrate can be reduced by using atomic layer deposition instead of conventional low pressure chemical vapor deposition to form the liner layer, the gate spacers, the first bubble prevention layer, the bit line spacers, and the second bubble prevention layer. Additionally, by using atomic layer deposition, the liner layer, the gate spacers, the first bubble prevention layer, the bit line spacers, and the second bubble prevention layer can all be formed without a vacuum break.
These and other features and aspects of the present invention will be readily apparent to those of ordinary sk
Kim Dong-chan
Kim Yeong-kwan
Lee Seung-hwan
Park Young-wook
Lee & Sterba, P.C.
Samsung Electronics Co,. Ltd.
Thomas Toniae M.
Wilczewski Mary
LandOfFree
Semiconductor device having thin film formed by atomic layer... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device having thin film formed by atomic layer..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device having thin film formed by atomic layer... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3323613