Static information storage and retrieval – Read/write circuit – Testing
Reexamination Certificate
1999-08-23
2003-11-18
Elms, Richard (Department: 2824)
Static information storage and retrieval
Read/write circuit
Testing
C365S094000, C365S189011, C365S189120
Reexamination Certificate
active
06650579
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to semiconductor devices, and more particularly, to a semiconductor device which has a central processing unit (CPU) and peripheral circuits on the same chip, and operates in an EPROM (Erasable and Programmable ROM)/ICE (In-Circuit Emulator) mode. The EPROM/ICE mode is a test mode for evaluating the characteristics and checking operations of the semiconductor chip. In the ROM mode, the semiconductor device operates in accordance with the data stored in an internal ROM.
2. Description of the Related Art
In recent years, in response to increasing demands for smaller and lighter electronic equipment for household appliances, more and more semiconductor devices having high precision analog circuits on one chip are employed in electronic equipment. In the case where a digital circuit and an analog circuit are mounted on the same chip, it is difficult to produce a developmental semiconductor device having an EPROM/ICE circuit, and a mass-production type semiconductor device having a ROM, and to make both semiconductor devices have the same characteristics.
Conventionally, the developmental semiconductor device having the EPROM/ICE mode circuit for characteristic evaluation and operation check has been produced separately from the mass-production type semiconductor device having the ROM. The two semiconductor devices of different types have been developed so that the characteristics of the semiconductor devices are the same. The developmental semiconductor device having the EPROM/ICE mode circuit has been used, instead of the mass-production type semiconductor device, for evaluating characteristics, checking operations, and debugging in software development.
In the case where a digital circuit and a high precision analog circuit are mounted on the same chip, however, it is difficult to produce the developmental semiconductor device having the EPROM/ICE mode circuit and the mass-production type semiconductor device having the ROM so that the two semiconductor devices of different types have the same characteristics. More specifically, in semiconductor devices of the two types used in a battery-powered electronic device, such as camera or portable telephone, the power consumption and noise characteristics of both semiconductor devices are required to be the same. It is even more difficult to produce such two semiconductor devices separately. Also, producing the two semiconductor devices separately causes problems that the manufacturing period of the semiconductor devices are prolonged, and that the production costs of the semiconductor devices become higher.
Furthermore, in a conventional semiconductor device having the EPROM/ICE mode circuit and the ROM on the same chip, data stored in the ROM can be easily read in the EPROM/ICE mode. Therefore, there is always the danger that other people might obtain the ROM data against the owner's will.
SUMMARY OF THE INVENTION
A general object of the present invention is to provide a semiconductor device in which the above disadvantages are eliminated.
A more specific object of the present invention is to provide a semiconductor device which operates in a test mode and a read mode, and is protected so that ROM data is not read in the test mode.
The above objects of the present invention are achieved by a semiconductor device having a test mode and a read mode. This semiconductor device includes a ROM and a control circuit which prevents data stored in the ROM from being outputted to the outside of the semiconductor device in the test mode when a predetermined condition is satisfied.
The above objects of the present invention are also achieved by a semiconductor device which includes: a mode switch circuit which selects between a test mode and a ROM mode in accordance with mode select signals from the outside; a ROM read control circuit which outputs a first signal to enable ROM data reading; and a register which transmits a second signal to the ROM read control circuit so that the ROM read control circuit outputs the first signal.
Since the semiconductor device operates in both the test mode and the ROM mode, there is no need to produce two types of semiconductor device corresponding to the two modes. Thus, the manufacturing period of the semiconductor device can be shortened, and the production costs can be reduced. When the semiconductor device is in the test mode, the ROM data cannot be read out unless a predetermined condition is satisfied. Thus, reading the ROM data against the owner's will can be avoided in the test mode.
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patent: 6085346 (2000-07-01), Lepejian et al.
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Arent Fox Kintner Plotkin & Kahn
Elms Richard
Le Toan
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