Semiconductor device having step gates and method for...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S213000, C257S288000, C257SE27084, C257SE21218, C438S689000, C438S706000, C438S707000, C438S710000, C438S713000

Reexamination Certificate

active

07378703

ABSTRACT:
The semiconductor device includes a substrate including a first active region and a second active region having a greater height than that of the first active region. A gate pattern has a step structure, which is formed on a border region between the first active region and the second active region. The gate pattern extends from a predetermined portion of the first active region to a predecided portion of the second active region. Gate spacers are formed on both sidewalls of the gate pattern. A first cell junction is formed in the first active region at one gate spacer and connected to a storage node contact. A second cell junction is formed in the second active region at the other gate spacer and connected to a bit line contact.

REFERENCES:
patent: 5210056 (1993-05-01), Pong et al.
patent: 5843846 (1998-12-01), Nguyen et al.
patent: 6465831 (2002-10-01), Park et al.
patent: 2001-0017172 (2001-03-01), None
patent: 10-2006-0075424 (2006-07-01), None
patent: 10-2006-0076533 (2006-07-01), None
patent: 10-2006-0087875 (2006-08-01), None
patent: 10-2006-0087897 (2006-08-01), None

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