Semiconductor device having source and drain regions which inclu

Details Semiconductor device having source and drain regions which inclu Semiconductor device having source and drain regions which inclu

1995-03-02

1997-06-03

Jackson, Jerome

Active solid-state devices (e.g., transistors, solid-state diode

Including region containing crystal damage

257 75, 438308, 438306, H01L 2930

Patent

active

056357524

ABSTRACT:
A semiconductor device having shallow junction, in which carrier concentration will not be reduced, sheet resistance will not be increased, and contact characteristic at a surface will not become inferior, is provided. A gate electrode is provided on a semiconductor substrate. At a surface of semiconductor substrate, a pair of source/drain layers having top and bottom surfaces are provided on both sides of gate electrode. In source/drain layer, a secondary-defect layer which extends horizontally is formed between top surface and bottom surface.

REFERENCES:
patent: 4053925 (1977-10-01), Burr et al.
patent: 5142344 (1992-08-01), Yamazaki
patent: 5276344 (1994-01-01), Arima et al.
patent: 5455437 (1995-10-01), Komori et al.
Bhatia, "Isolation Process For Shallow Junction Devices," IBM Tech. Disc. Bull., vol. 19, No. 11; Apr. 1977, p. 4171.

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