Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate
2011-01-11
2011-01-11
Hoang, Huan (Department: 2827)
Static information storage and retrieval
Read/write circuit
Differential sensing
C365S205000, C365S194000
Reexamination Certificate
active
07869294
ABSTRACT:
A single-ended sense amplifier in a semiconductor storage device having a hierarchical bit line structure includes a first MOS transistor for amplifying a signal outputted from a memory cell to a bit line, a second MOS transistor for feeding the output of the first MOS transistor to a global bit line, and a global bit line voltage determination circuit; and at least the ON/OFF timing of the second MOS transistor or the read timing of a global sense amplifier that includes the global bit line voltage determination circuit is controlled by the output signal of a delay circuit that includes a replica of the first MOS transistor and a replica of the global bit line voltage determination circuit.
REFERENCES:
patent: 7486565 (2009-02-01), Edahiro
patent: 7782697 (2010-08-01), Terzioglu et al.
patent: 2007/0147128 (2007-06-01), Edahiro
patent: 2007-172779 (2007-07-01), None
Kajigaya Kazuhiko
Yoshida Soichiro
Elpida Memory Inc.
Hoang Huan
McGinn IP Law Group PLLC
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