Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2005-01-18
2005-01-18
Dang, Trung (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S164000, C438S237000
Reexamination Certificate
active
06844223
ABSTRACT:
The present invention relates to a highly integrated SOI semiconductor device and a method for fabricating the SOI semiconductor device by reducing a distance between diodes or well resistors without any reduction in insulating characteristics. The device includes a first conductivity type semiconductor substrate and a surface silicon layer formed by inserting an insulating layer on the semiconductor substrate. A trench is formed by etching a predetermined portion of surface silicon layer, insulating layer and substrate to expose a part of the semiconductor substrate to be used for an element separating region, and a STI is formed in the trench. A transistor is constructed on the surface silicon layer surrounded by the insulating layer and STI with a gate electrode being positioned at the center thereof and with source/drain region being formed in the surface silicon layer of both edges of the gate electrode for enabling its bottom part to be in contact with the insulating layer. A first groove is formed between the STI at one side of the transistor by etching the surface silicon layer and insulating layer to expose a predetermined portion of an active region of a second conductivity type well in the semiconductor substrate. A second groove is formed between the STI at one side of the first groove by etching the surface silicon layer and insulating layer to expose a predetermined portion of the active region of the semiconductor substrate. A first diode diffusion region of a first conductivity type is formed in a second conductivity type well under the first groove, and a second diode diffusion region of a second conductivity type is formed in the semiconductor substrate under the second groove.
REFERENCES:
patent: 6303414 (2001-10-01), Ang et al.
patent: 6406948 (2002-06-01), Jun et al.
patent: 20020053717 (2002-05-01), Sumida
Kim Byung-Sun
Ko Young-Gun
Dang Trung
Mills & Onello LLP
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