Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-09-16
2004-10-12
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S382000, C257S383000, C257S384000, C257S288000, C257S388000
Reexamination Certificate
active
06803636
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method of fabricating a semiconductor device, and more particularly, it relates to a semiconductor device having silicide films and a method of fabricating a semiconductor device.
2. Description of the Background Art
Following recent requirements for refinement and high-speed operation of a semiconductor device, various techniques have been developed for reducing the resistance values of a gate electrode and a source/drain electrode of a transistor. As one of such techniques, a salicide (self-aligned silicide) technique of silicifying the upper portions of the gate electrode and the source/drain electrode of the transistor in a self-aligned manner is put into practice.
When the salicide technique is applied to an analog device having a capacitive element and a resistive element, however, the upper portion of a polycrystalline silicon film for the resistive element is also silicified and hence the resistance of the resistive element is disadvantageously reduced to about 2 to 5 &OHgr;/. Further, a gate oxide film must be prevented from breakdown resulting from static electricity not only in the analog device but also in an input/output circuit part of a semiconductor device, for example. In general, therefore, the resistance of a high-concentration impurity diffusion layer of a source/drain region is set relatively high. When the salicide technique is applied to the semiconductor device having such an input/output circuit part, however, the upper portion of the high-concentration impurity diffusion layer of the source/drain region is also silicified and hence the resistance thereof is disadvantageously reduced.
In relation to this problem, Japanese Patent Laying-Open No. 2000-22150, for example, proposes a technique of preventing regions such as an input/output part and a resistance part requiring high resistance from silicification in a salicide process.
In general, the sheet resistance of an unsilicified silicon region is decided by impurity implantation conditions and heat treatment conditions for forming a transistor. In other words, the unsilicified silicon region can have a sheet resistance value in the range of the same value as that of a diffusion layer formed with the highest impurity concentration and the same value as that of a well region formed with the lowest impurity concentration. Further, the sheet resistance value of the unsilicified silicon region depends on the impurity concentration decided by combining impurity implantation conditions in the aforementioned range. In other words, the sheet resistance of the unsilicified silicon region must be generally decided by controlling the impurity implantation conditions for forming the transistor thereby controlling the impurity concentration.
Following recent diversification of the analog device mounted on a semiconductor device, however, extension of the degree of freedom in design is hindered if the sheet resistance value of the unsilicified silicon region is decided by the impurity implantation conditions employed for forming the transistor. Particularly when resistivity values and resistance values are previously decided in the stage of design for forming a device corresponding thereto with regulation in the stage of fabrication, the resistance value of the unsilicified silicon region must be arbitrarily decidable in the range of about 4 &OHgr;/ for a general low-resistance silicide region to about 1000 &OHgr;/ for a high-resistance silicide region in formation of the transistor.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor device capable of easily setting the resistance of a resistive element or the like to an arbitrary value without controlling an impurity implantation condition in formation of a transistor or the like.
Another object of the present invention is to provide a method of fabricating a semiconductor device capable of easily setting the sheet resistance of a resistive element or the like to an arbitrary value without controlling an impurity implantation condition in formation of a transistor or the like.
In order to attain the aforementioned objects, a semiconductor device according to a first aspect of the present invention comprises a first silicide film formed on a first silicon region and a second silicide film, formed on a second silicon region, consisting of the same silicide material as the first silicide film and differing from the first silicide film in film quality to have a sheet resistance value different from that of the first silicide film.
In the semiconductor device according to the first aspect, as hereinabove described, the second silicide film consisting of the same silicide material as the first silicide film and differing from the first silicide film in film quality to have a sheet resistance value different from that of the first silicide film is so provided that a silicide film having a low sheet resistance value and a silicide film having a high sheet resistance value can be easily obtained. When an impurity is introduced into the second silicide film itself so that the second silicide film differs from the first silicide film in film quality in this case, for example, a second silicide film having an arbitrary high sheet resistance value can be obtained by controlling the type of and the introduction condition for the impurity. Thus, the sheet resistance of a resistive element or the like can be easily set to an arbitrary value without controlling an impurity injection condition in formation of a transistor or the like. Consequently, the degree of freedom in design can be extended.
In the aforementioned semiconductor device according to the first aspect, the second silicide film preferably differs from the first silicide film in film quality due to introduction of an impurity, to have a higher sheet resistance value than the first silicide film. According to this structure, a second silicide film having an arbitrary high sheet resistance value can be easily obtained by controlling the type of and the introduction condition for the impurity.
A semiconductor device according to a second aspect of the present invention comprises a first silicon region and a second silicon region, a first silicide film formed on the first silicon region and a metal layer, formed on the second silicon region, having a sheet resistance value different from that of the first silicide film.
In the semiconductor device according to the second aspect, as hereinabove described, the first silicide film formed on the first silicon region and the metal layer, formed on the second silicon region, having the sheet resistance value different from that of the first silicide film are so provided that a silicide film or a metal layer having a low sheet resistance value and a metal layer or a silicide film having a high sheet resistance value can be easily obtained. In this case, the sheet resistance values of the first silicide film and the metal layer can be easily controlled to prescribed values by controlling the materials for and the thicknesses of the first silicide film and the metal layer, for example. Thus, the sheet resistance value of a resistive element or the like can be easily set to an arbitrary value without controlling an impurity implantation condition for forming a transistor or the like. Consequently, the degree of freedom in design can be extended.
In the aforementioned semiconductor device according to the second aspect, the first silicon region and the second silicon region may consist of the same silicon layer.
A semiconductor device according to a third aspect of the present invention comprises a silicon region and a silicide film, formed on the silicon region, deteriorated in crystallinity to be increased in sheet resistance.
In the semiconductor device according to the third aspect, as hereinabove described, the silicide film deteriorated in crystallinity to be increased in sheet resistance is so provided that a silicide film
Ibara Yoshikazu
Nishida Atsuhiro
Flynn Nathan J.
McDermott Will & Emery LLP
Quinto Kevin
Sanyo Electric Co,. Ltd.
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